forked from luck/tmp_suning_uos_patched
ARC: [plat-arcfpga]: Enabling DeviceTree for Angel4 board
* arc-uart platform device now populated dynamically, using of_platform_populate() - applies to any other device whatsoever. * uart in turn requires incore arc-intc to be also present in DT * A irq-domain needs to be instantiated for IRQ requests by DT probed device (e.g. arc-uart) TODO: switch over to linear irq domain once all devs have been transitioned to DT Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Arnd Bergmann <arnd@arndb.de>
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24
Documentation/devicetree/bindings/arc/interrupts.txt
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24
Documentation/devicetree/bindings/arc/interrupts.txt
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@ -0,0 +1,24 @@
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* ARC700 incore Interrupt Controller
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The core interrupt controller provides 32 prioritised interrupts (2 levels)
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to ARC700 core.
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Properties:
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- compatible: "snps,arc700-intc"
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- interrupt-controller: This is an interrupt controller.
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- #interrupt-cells: Must be <1>.
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Single Cell "interrupts" property of a device specifies the IRQ number
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between 0 to 31
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intc accessed via the special ARC AUX register interface, hence "reg" property
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is not specified.
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Example:
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intc: interrupt-controller {
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compatible = "snps,arc700-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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@ -1,5 +1,5 @@
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# Built-in dtb
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builtindtb-y := skeleton
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builtindtb-y := angel4
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ifneq ($(CONFIG_ARC_BUILTIN_DTB_NAME),"")
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builtindtb-y := $(patsubst "%",%,$(CONFIG_ARC_BUILTIN_DTB_NAME))
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55
arch/arc/boot/dts/angel4.dts
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arch/arc/boot/dts/angel4.dts
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@ -0,0 +1,55 @@
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/*
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* Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "skeleton.dtsi"
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/ {
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compatible = "snps,arc-angel4";
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clock-frequency = <80000000>; /* 80 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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chosen {
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bootargs = "console=ttyARC0,115200n8";
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};
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aliases {
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serial0 = &arcuart0;
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x10000000>; /* 256M */
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};
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fpga {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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/* child and parent address space 1:1 mapped */
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ranges;
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intc: interrupt-controller {
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compatible = "snps,arc700-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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arcuart0: serial@c0fc1000 {
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compatible = "snps,arc-uart";
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reg = <0xc0fc1000 0x100>;
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interrupts = <5>;
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clock-frequency = <80000000>;
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baud = <115200>;
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status = "okay";
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};
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};
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};
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@ -18,6 +18,18 @@ / {
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#size-cells = <1>;
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chosen { };
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aliases { };
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "snps,arc770d";
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reg = <0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x10000000>; /* 256M */
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@ -9,6 +9,8 @@
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/irqdomain.h>
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#include <asm/sections.h>
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#include <asm/irq.h>
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@ -59,16 +61,40 @@ static struct irq_chip onchip_intc = {
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.irq_unmask = arc_unmask_irq,
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};
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static int arc_intc_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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if (irq == TIMER0_IRQ)
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irq_set_chip_and_handler(irq, &onchip_intc, handle_percpu_irq);
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else
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irq_set_chip_and_handler(irq, &onchip_intc, handle_level_irq);
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return 0;
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}
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static const struct irq_domain_ops arc_intc_domain_ops = {
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.xlate = irq_domain_xlate_onecell,
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.map = arc_intc_domain_map,
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};
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static struct irq_domain *root_domain;
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void __init init_onchip_IRQ(void)
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{
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int i;
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struct device_node *intc = NULL;
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for (i = 0; i < NR_IRQS; i++)
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irq_set_chip_and_handler(i, &onchip_intc, handle_level_irq);
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intc = of_find_compatible_node(NULL, NULL, "snps,arc700-intc");
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if(!intc)
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panic("DeviceTree Missing incore intc\n");
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#ifdef CONFIG_SMP
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irq_set_chip_and_handler(TIMER0_IRQ, &onchip_intc, handle_percpu_irq);
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#endif
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root_domain = irq_domain_add_legacy(intc, NR_IRQS, 0, 0,
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&arc_intc_domain_ops, NULL);
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if (!root_domain)
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panic("root irq domain not avail\n");
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/* with this we don't need to export root_domain */
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irq_set_default_host(root_domain);
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}
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/*
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@ -13,6 +13,7 @@
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/console.h>
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#include <linux/of_platform.h>
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#include <asm/setup.h>
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#include <asm/irq.h>
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#include <asm/clk.h>
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/*----------------------- Platform Devices -----------------------------*/
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#if defined(CONFIG_SERIAL_ARC) || defined(CONFIG_SERIAL_ARC_MODULE)
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static unsigned long arc_uart_info[] = {
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CONFIG_ARC_SERIAL_BAUD, /* uart->baud */
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-1, /* uart->port.uartclk */
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-1, /* uart->is_emulated (runtime @running_on_hw) */
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0, /* uart->is_emulated (runtime @running_on_hw) */
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0, /* uart->port.uartclk */
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0, /* uart->baud */
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0
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};
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#define ARC_UART_DEV(n) \
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\
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static struct resource arc_uart##n##_res[] = { \
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{ \
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.start = UART##n##_BASE, \
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.end = UART##n##_BASE + 0xFF, \
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.flags = IORESOURCE_MEM, \
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}, \
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{ \
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.start = UART##n##_IRQ, \
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.end = UART##n##_IRQ, \
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.flags = IORESOURCE_IRQ, \
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}, \
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}; \
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\
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static struct platform_device arc_uart##n##_dev = { \
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.name = "arc-uart", \
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.id = n, \
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.num_resources = ARRAY_SIZE(arc_uart##n##_res), \
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.resource = arc_uart##n##_res, \
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.dev = { \
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.platform_data = &arc_uart_info, \
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}, \
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}
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#if defined(CONFIG_SERIAL_ARC_CONSOLE)
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/*
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* static platform data - but only for early serial
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* TBD: derive this from a special DT node
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*/
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static struct resource arc_uart0_res[] = {
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{
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.start = UART0_BASE,
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.end = UART0_BASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = UART0_IRQ,
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.end = UART0_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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ARC_UART_DEV(0);
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#if CONFIG_SERIAL_ARC_NR_PORTS > 1
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ARC_UART_DEV(1);
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#endif
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static struct platform_device arc_uart0_dev = {
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.name = "arc-uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(arc_uart0_res),
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.resource = arc_uart0_res,
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.dev = {
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.platform_data = &arc_uart_info,
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},
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};
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static struct platform_device *fpga_early_devs[] __initdata = {
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#if defined(CONFIG_SERIAL_ARC_CONSOLE)
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&arc_uart0_dev,
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#endif
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};
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#endif
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static void arc_fpga_serial_init(void)
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{
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/* To let driver workaround ISS bug: baudh Reg can't be set to 0 */
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arc_uart_info[0] = !running_on_hw;
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arc_uart_info[1] = arc_get_core_freq();
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/* To let driver workaround ISS bug: baudh Reg can't be set to 0 */
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arc_uart_info[2] = !running_on_hw;
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arc_uart_info[2] = CONFIG_ARC_SERIAL_BAUD;
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#if defined(CONFIG_SERIAL_ARC_CONSOLE)
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early_platform_add_devices(fpga_early_devs,
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ARRAY_SIZE(fpga_early_devs));
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* otherwise the early console never gets a chance to run.
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*/
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add_preferred_console("ttyARC", 0, "115200");
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#endif
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}
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#else
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static void arc_fpga_serial_init(void)
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{
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}
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#endif /* CONFIG_SERIAL_ARC */
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/*
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* Early Platform Initialization called from setup_arch()
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*/
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arc_fpga_serial_init();
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}
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static struct platform_device *fpga_devs[] __initdata = {
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static struct of_dev_auxdata plat_auxdata_lookup[] __initdata = {
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#if defined(CONFIG_SERIAL_ARC) || defined(CONFIG_SERIAL_ARC_MODULE)
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&arc_uart0_dev,
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#if CONFIG_SERIAL_ARC_NR_PORTS > 1
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&arc_uart1_dev,
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#endif
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OF_DEV_AUXDATA("snps,arc-uart", UART0_BASE, "arc-uart", arc_uart_info),
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#endif
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{}
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};
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int __init fpga_plat_init(void)
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{
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pr_info("[plat-arcfpga]: registering device resources\n");
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platform_add_devices(fpga_devs, ARRAY_SIZE(fpga_devs));
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/*
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* Traverses flattened DeviceTree - registering platform devices
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* complete with their resources
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*/
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of_platform_populate(NULL, of_default_bus_match_table,
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plat_auxdata_lookup, NULL);
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return 0;
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}
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