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ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi

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No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Stephen Warren 2013-01-23 09:43:49 -07:00
parent bf5fcc76d3
commit abf80c276d
3 changed files with 5 additions and 3 deletions
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1
arch/arm/boot/dts/tegra30-beaver.dts
View File

@ -90,7 +90,6 @@ sdio3 {
serial@70006000 {
status = "okay";
clock-frequency = <408000000>;
};
i2c@7000c000 {

2
arch/arm/boot/dts/tegra30-cardhu.dtsi
View File

@ -120,13 +120,11 @@ uart3_txd_pw6 {
serial@70006000 {
status = "okay";
clock-frequency = <408000000>;
};
serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
status = "okay";
clock-frequency = <408000000>;
};
i2c@7000c000 {

5
arch/arm/boot/dts/tegra30.dtsi
View File

@ -234,6 +234,7 @@ uarta: serial@70006000 {
reg = <0x70006000 0x40>;
reg-shift = <2>;
interrupts = <0 36 0x04>;
clock-frequency = <408000000>;
nvidia,dma-request-selector = <&apbdma 8>;
clocks = <&tegra_car 6>;
status = "disabled";
@ -243,6 +244,7 @@ uartb: serial@70006040 {
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006040 0x40>;
reg-shift = <2>;
clock-frequency = <408000000>;
interrupts = <0 37 0x04>;
nvidia,dma-request-selector = <&apbdma 9>;
clocks = <&tegra_car 160>;
@ -253,6 +255,7 @@ uartc: serial@70006200 {
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006200 0x100>;
reg-shift = <2>;
clock-frequency = <408000000>;
interrupts = <0 46 0x04>;
nvidia,dma-request-selector = <&apbdma 10>;
clocks = <&tegra_car 55>;
@ -263,6 +266,7 @@ uartd: serial@70006300 {
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006300 0x100>;
reg-shift = <2>;
clock-frequency = <408000000>;
interrupts = <0 90 0x04>;
nvidia,dma-request-selector = <&apbdma 19>;
clocks = <&tegra_car 65>;
@ -273,6 +277,7 @@ uarte: serial@70006400 {
compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
reg = <0x70006400 0x100>;
reg-shift = <2>;
clock-frequency = <408000000>;
interrupts = <0 91 0x04>;
nvidia,dma-request-selector = <&apbdma 20>;
clocks = <&tegra_car 66>;