forked from luck/tmp_suning_uos_patched
drm/tegra: Use generic HDMI infoframe helpers
Use the generic HDMI infoframe helpers to get rid of the NVIDIA Tegra reimplementation. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Thierry Reding
parent
5e308591a8
commit
ac24c2204a
@ -4,6 +4,7 @@ config DRM_TEGRA
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select DRM_KMS_HELPER
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select DRM_GEM_CMA_HELPER
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select DRM_KMS_CMA_HELPER
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select DRM_HDMI
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select FB_CFB_FILLRECT
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select FB_CFB_COPYAREA
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select FB_CFB_IMAGEBLIT
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@ -10,6 +10,7 @@
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/gpio.h>
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#include <linux/hdmi.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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@ -17,6 +18,8 @@
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#include <mach/clk.h>
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#include <drm/drm_edid.h>
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#include "hdmi.h"
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#include "drm.h"
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#include "dc.h"
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@ -401,54 +404,65 @@ static int tegra_hdmi_setup_audio(struct tegra_hdmi *hdmi, unsigned int pclk)
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return 0;
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}
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static void tegra_hdmi_write_infopack(struct tegra_hdmi *hdmi,
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unsigned int offset, u8 type,
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u8 version, void *data, size_t size)
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static inline unsigned long tegra_hdmi_subpack(const u8 *ptr, size_t size)
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{
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unsigned long value;
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u8 *ptr = data;
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u32 subpack[2];
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unsigned long value = 0;
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size_t i;
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u8 csum;
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/* first byte of data is the checksum */
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csum = type + version + size - 1;
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for (i = size; i > 0; i--)
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value = (value << 8) | ptr[i - 1];
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for (i = 1; i < size; i++)
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csum += ptr[i];
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return value;
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}
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ptr[0] = 0x100 - csum;
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static void tegra_hdmi_write_infopack(struct tegra_hdmi *hdmi, const void *data,
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size_t size)
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{
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const u8 *ptr = data;
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unsigned long offset;
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unsigned long value;
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size_t i, j;
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value = INFOFRAME_HEADER_TYPE(type) |
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INFOFRAME_HEADER_VERSION(version) |
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INFOFRAME_HEADER_LEN(size - 1);
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switch (ptr[0]) {
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case HDMI_INFOFRAME_TYPE_AVI:
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offset = HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_HEADER;
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break;
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case HDMI_INFOFRAME_TYPE_AUDIO:
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offset = HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_HEADER;
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break;
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case HDMI_INFOFRAME_TYPE_VENDOR:
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offset = HDMI_NV_PDISP_HDMI_GENERIC_HEADER;
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break;
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default:
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dev_err(hdmi->dev, "unsupported infoframe type: %02x\n",
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ptr[0]);
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return;
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}
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value = INFOFRAME_HEADER_TYPE(ptr[0]) |
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INFOFRAME_HEADER_VERSION(ptr[1]) |
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INFOFRAME_HEADER_LEN(ptr[2]);
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tegra_hdmi_writel(hdmi, value, offset);
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offset++;
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/* The audio inforame only has one set of subpack registers. The hdmi
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* block pads the rest of the data as per the spec so we have to fixup
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* the length before filling in the subpacks.
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/*
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* Each subpack contains 7 bytes, divided into:
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* - subpack_low: bytes 0 - 3
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* - subpack_high: bytes 4 - 6 (with byte 7 padded to 0x00)
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*/
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if (offset == HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_HEADER)
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size = 6;
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for (i = 3, j = 0; i < size; i += 7, j += 8) {
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size_t rem = size - i, num = min_t(size_t, rem, 4);
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/* each subpack 7 bytes devided into:
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* subpack_low - bytes 0 - 3
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* subpack_high - bytes 4 - 6 (with byte 7 padded to 0x00)
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*/
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for (i = 0; i < size; i++) {
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size_t index = i % 7;
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value = tegra_hdmi_subpack(&ptr[i], num);
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tegra_hdmi_writel(hdmi, value, offset++);
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if (index == 0)
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memset(subpack, 0x0, sizeof(subpack));
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num = min_t(size_t, rem - num, 3);
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((u8 *)subpack)[index] = ptr[i];
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if (index == 6 || (i + 1 == size)) {
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unsigned int reg = offset + 1 + (i / 7) * 2;
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tegra_hdmi_writel(hdmi, subpack[0], reg);
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tegra_hdmi_writel(hdmi, subpack[1], reg + 1);
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}
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value = tegra_hdmi_subpack(&ptr[i + 4], num);
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tegra_hdmi_writel(hdmi, value, offset++);
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}
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}
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@ -456,9 +470,8 @@ static void tegra_hdmi_setup_avi_infoframe(struct tegra_hdmi *hdmi,
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struct drm_display_mode *mode)
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{
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struct hdmi_avi_infoframe frame;
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unsigned int h_front_porch;
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unsigned int hsize = 16;
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unsigned int vsize = 9;
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u8 buffer[17];
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ssize_t err;
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if (hdmi->dvi) {
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tegra_hdmi_writel(hdmi, 0,
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@ -466,69 +479,19 @@ static void tegra_hdmi_setup_avi_infoframe(struct tegra_hdmi *hdmi,
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return;
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}
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h_front_porch = mode->hsync_start - mode->hdisplay;
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memset(&frame, 0, sizeof(frame));
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frame.r = HDMI_AVI_R_SAME;
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switch (mode->vdisplay) {
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case 480:
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if (mode->hdisplay == 640) {
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frame.m = HDMI_AVI_M_4_3;
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frame.vic = 1;
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} else {
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frame.m = HDMI_AVI_M_16_9;
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frame.vic = 3;
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}
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break;
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case 576:
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if (((hsize * 10) / vsize) > 14) {
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frame.m = HDMI_AVI_M_16_9;
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frame.vic = 18;
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} else {
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frame.m = HDMI_AVI_M_4_3;
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frame.vic = 17;
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}
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break;
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case 720:
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case 1470: /* stereo mode */
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frame.m = HDMI_AVI_M_16_9;
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if (h_front_porch == 110)
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frame.vic = 4;
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else
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frame.vic = 19;
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break;
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case 1080:
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case 2205: /* stereo mode */
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frame.m = HDMI_AVI_M_16_9;
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switch (h_front_porch) {
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case 88:
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frame.vic = 16;
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break;
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case 528:
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frame.vic = 31;
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break;
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default:
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frame.vic = 32;
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break;
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}
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break;
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default:
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frame.m = HDMI_AVI_M_16_9;
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frame.vic = 0;
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break;
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err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
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if (err < 0) {
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dev_err(hdmi->dev, "failed to setup AVI infoframe: %zd\n", err);
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return;
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}
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tegra_hdmi_write_infopack(hdmi, HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_HEADER,
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HDMI_INFOFRAME_TYPE_AVI, HDMI_AVI_VERSION,
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&frame, sizeof(frame));
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err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
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if (err < 0) {
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dev_err(hdmi->dev, "failed to pack AVI infoframe: %zd\n", err);
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return;
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}
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tegra_hdmi_write_infopack(hdmi, buffer, err);
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tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE,
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HDMI_NV_PDISP_HDMI_AVI_INFOFRAME_CTRL);
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@ -537,6 +500,8 @@ static void tegra_hdmi_setup_avi_infoframe(struct tegra_hdmi *hdmi,
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static void tegra_hdmi_setup_audio_infoframe(struct tegra_hdmi *hdmi)
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{
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struct hdmi_audio_infoframe frame;
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u8 buffer[14];
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ssize_t err;
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if (hdmi->dvi) {
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tegra_hdmi_writel(hdmi, 0,
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@ -544,14 +509,29 @@ static void tegra_hdmi_setup_audio_infoframe(struct tegra_hdmi *hdmi)
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return;
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}
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memset(&frame, 0, sizeof(frame));
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frame.cc = HDMI_AUDIO_CC_2;
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err = hdmi_audio_infoframe_init(&frame);
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if (err < 0) {
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dev_err(hdmi->dev, "failed to initialize audio infoframe: %d\n",
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err);
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return;
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}
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tegra_hdmi_write_infopack(hdmi,
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HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_HEADER,
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HDMI_INFOFRAME_TYPE_AUDIO,
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HDMI_AUDIO_VERSION,
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&frame, sizeof(frame));
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frame.channels = 2;
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err = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer));
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if (err < 0) {
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dev_err(hdmi->dev, "failed to pack audio infoframe: %zd\n",
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err);
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return;
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}
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/*
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* The audio infoframe has only one set of subpack registers, so the
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* infoframe needs to be truncated. One set of subpack registers can
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* contain 7 bytes. Including the 3 byte header only the first 10
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* bytes can be programmed.
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*/
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tegra_hdmi_write_infopack(hdmi, buffer, min(10, err));
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tegra_hdmi_writel(hdmi, INFOFRAME_CTRL_ENABLE,
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HDMI_NV_PDISP_HDMI_AUDIO_INFOFRAME_CTRL);
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@ -559,8 +539,10 @@ static void tegra_hdmi_setup_audio_infoframe(struct tegra_hdmi *hdmi)
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static void tegra_hdmi_setup_stereo_infoframe(struct tegra_hdmi *hdmi)
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{
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struct hdmi_stereo_infoframe frame;
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struct hdmi_vendor_infoframe frame;
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unsigned long value;
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u8 buffer[10];
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ssize_t err;
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if (!hdmi->stereo) {
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value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
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@ -570,22 +552,32 @@ static void tegra_hdmi_setup_stereo_infoframe(struct tegra_hdmi *hdmi)
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}
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memset(&frame, 0, sizeof(frame));
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frame.regid0 = 0x03;
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frame.regid1 = 0x0c;
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frame.regid2 = 0x00;
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frame.hdmi_video_format = 2;
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frame.type = HDMI_INFOFRAME_TYPE_VENDOR;
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frame.version = 0x01;
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frame.length = 6;
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frame.data[0] = 0x03; /* regid0 */
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frame.data[1] = 0x0c; /* regid1 */
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frame.data[2] = 0x00; /* regid2 */
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frame.data[3] = 0x02 << 5; /* video format */
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/* TODO: 74 MHz limit? */
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if (1) {
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frame._3d_structure = 0;
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frame.data[4] = 0x00 << 4; /* 3D structure */
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} else {
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frame._3d_structure = 8;
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frame._3d_ext_data = 0;
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frame.data[4] = 0x08 << 4; /* 3D structure */
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frame.data[5] = 0x00 << 4; /* 3D ext. data */
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}
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tegra_hdmi_write_infopack(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_HEADER,
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HDMI_INFOFRAME_TYPE_VENDOR,
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HDMI_VENDOR_VERSION, &frame, 6);
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err = hdmi_vendor_infoframe_pack(&frame, buffer, sizeof(buffer));
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if (err < 0) {
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dev_err(hdmi->dev, "failed to pack vendor infoframe: %zd\n",
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err);
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return;
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}
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tegra_hdmi_write_infopack(hdmi, buffer, err);
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value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_HDMI_GENERIC_CTRL);
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value |= GENERIC_CTRL_ENABLE;
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@ -10,195 +10,6 @@
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#ifndef TEGRA_HDMI_H
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#define TEGRA_HDMI_H 1
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#define HDMI_INFOFRAME_TYPE_VENDOR 0x81
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#define HDMI_INFOFRAME_TYPE_AVI 0x82
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#define HDMI_INFOFRAME_TYPE_SPD 0x83
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#define HDMI_INFOFRAME_TYPE_AUDIO 0x84
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#define HDMI_INFOFRAME_TYPE_MPEG_SRC 0x85
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#define HDMI_INFOFRAME_TYPE_NTSC_VBI 0x86
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/* all fields little endian */
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struct hdmi_avi_infoframe {
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/* PB0 */
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u8 csum;
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/* PB1 */
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unsigned s:2; /* scan information */
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unsigned b:2; /* bar info data valid */
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unsigned a:1; /* active info present */
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unsigned y:2; /* RGB or YCbCr */
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unsigned res1:1;
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/* PB2 */
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unsigned r:4; /* active format aspect ratio */
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unsigned m:2; /* picture aspect ratio */
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unsigned c:2; /* colorimetry */
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/* PB3 */
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unsigned sc:2; /* scan information */
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unsigned q:2; /* quantization range */
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unsigned ec:3; /* extended colorimetry */
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unsigned itc:1; /* it content */
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/* PB4 */
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unsigned vic:7; /* video format id code */
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unsigned res4:1;
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/* PB5 */
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unsigned pr:4; /* pixel repetition factor */
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unsigned cn:2; /* it content type*/
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unsigned yq:2; /* ycc quantization range */
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/* PB6-7 */
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u16 top_bar_end_line;
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/* PB8-9 */
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u16 bot_bar_start_line;
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/* PB10-11 */
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u16 left_bar_end_pixel;
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/* PB12-13 */
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u16 right_bar_start_pixel;
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} __packed;
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#define HDMI_AVI_VERSION 0x02
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#define HDMI_AVI_Y_RGB 0x0
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#define HDMI_AVI_Y_YCBCR_422 0x1
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#define HDMI_AVI_Y_YCBCR_444 0x2
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#define HDMI_AVI_B_VERT 0x1
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#define HDMI_AVI_B_HORIZ 0x2
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#define HDMI_AVI_S_NONE 0x0
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#define HDMI_AVI_S_OVERSCAN 0x1
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#define HDMI_AVI_S_UNDERSCAN 0x2
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#define HDMI_AVI_C_NONE 0x0
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#define HDMI_AVI_C_SMPTE 0x1
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#define HDMI_AVI_C_ITU_R 0x2
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#define HDMI_AVI_C_EXTENDED 0x4
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#define HDMI_AVI_M_4_3 0x1
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#define HDMI_AVI_M_16_9 0x2
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#define HDMI_AVI_R_SAME 0x8
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#define HDMI_AVI_R_4_3_CENTER 0x9
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#define HDMI_AVI_R_16_9_CENTER 0xa
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#define HDMI_AVI_R_14_9_CENTER 0xb
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/* all fields little endian */
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struct hdmi_audio_infoframe {
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/* PB0 */
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u8 csum;
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/* PB1 */
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unsigned cc:3; /* channel count */
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unsigned res1:1;
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unsigned ct:4; /* coding type */
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/* PB2 */
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unsigned ss:2; /* sample size */
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unsigned sf:3; /* sample frequency */
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unsigned res2:3;
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/* PB3 */
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unsigned cxt:5; /* coding extention type */
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unsigned res3:3;
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/* PB4 */
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u8 ca; /* channel/speaker allocation */
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/* PB5 */
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unsigned res5:3;
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unsigned lsv:4; /* level shift value */
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unsigned dm_inh:1; /* downmix inhibit */
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/* PB6-10 reserved */
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u8 res6;
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u8 res7;
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u8 res8;
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u8 res9;
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u8 res10;
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} __packed;
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#define HDMI_AUDIO_VERSION 0x01
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#define HDMI_AUDIO_CC_STREAM 0x0 /* specified by audio stream */
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#define HDMI_AUDIO_CC_2 0x1
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#define HDMI_AUDIO_CC_3 0x2
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#define HDMI_AUDIO_CC_4 0x3
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#define HDMI_AUDIO_CC_5 0x4
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#define HDMI_AUDIO_CC_6 0x5
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#define HDMI_AUDIO_CC_7 0x6
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#define HDMI_AUDIO_CC_8 0x7
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#define HDMI_AUDIO_CT_STREAM 0x0 /* specified by audio stream */
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#define HDMI_AUDIO_CT_PCM 0x1
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#define HDMI_AUDIO_CT_AC3 0x2
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#define HDMI_AUDIO_CT_MPEG1 0x3
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#define HDMI_AUDIO_CT_MP3 0x4
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#define HDMI_AUDIO_CT_MPEG2 0x5
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#define HDMI_AUDIO_CT_AAC_LC 0x6
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||||
#define HDMI_AUDIO_CT_DTS 0x7
|
||||
#define HDMI_AUDIO_CT_ATRAC 0x8
|
||||
#define HDMI_AUDIO_CT_DSD 0x9
|
||||
#define HDMI_AUDIO_CT_E_AC3 0xa
|
||||
#define HDMI_AUDIO_CT_DTS_HD 0xb
|
||||
#define HDMI_AUDIO_CT_MLP 0xc
|
||||
#define HDMI_AUDIO_CT_DST 0xd
|
||||
#define HDMI_AUDIO_CT_WMA_PRO 0xe
|
||||
#define HDMI_AUDIO_CT_CXT 0xf
|
||||
|
||||
#define HDMI_AUDIO_SF_STREAM 0x0 /* specified by audio stream */
|
||||
#define HDMI_AUIDO_SF_32K 0x1
|
||||
#define HDMI_AUDIO_SF_44_1K 0x2
|
||||
#define HDMI_AUDIO_SF_48K 0x3
|
||||
#define HDMI_AUDIO_SF_88_2K 0x4
|
||||
#define HDMI_AUDIO_SF_96K 0x5
|
||||
#define HDMI_AUDIO_SF_176_4K 0x6
|
||||
#define HDMI_AUDIO_SF_192K 0x7
|
||||
|
||||
#define HDMI_AUDIO_SS_STREAM 0x0 /* specified by audio stream */
|
||||
#define HDMI_AUDIO_SS_16BIT 0x1
|
||||
#define HDMI_AUDIO_SS_20BIT 0x2
|
||||
#define HDMI_AUDIO_SS_24BIT 0x3
|
||||
|
||||
#define HDMI_AUDIO_CXT_CT 0x0 /* refer to coding in CT */
|
||||
#define HDMI_AUDIO_CXT_HE_AAC 0x1
|
||||
#define HDMI_AUDIO_CXT_HE_AAC_V2 0x2
|
||||
#define HDMI_AUDIO_CXT_MPEG_SURROUND 0x3
|
||||
|
||||
/* all fields little endian */
|
||||
struct hdmi_stereo_infoframe {
|
||||
/* PB0 */
|
||||
u8 csum;
|
||||
|
||||
/* PB1 */
|
||||
u8 regid0;
|
||||
|
||||
/* PB2 */
|
||||
u8 regid1;
|
||||
|
||||
/* PB3 */
|
||||
u8 regid2;
|
||||
|
||||
/* PB4 */
|
||||
unsigned res1:5;
|
||||
unsigned hdmi_video_format:3;
|
||||
|
||||
/* PB5 */
|
||||
unsigned res2:4;
|
||||
unsigned _3d_structure:4;
|
||||
|
||||
/* PB6*/
|
||||
unsigned res3:4;
|
||||
unsigned _3d_ext_data:4;
|
||||
} __packed;
|
||||
|
||||
#define HDMI_VENDOR_VERSION 0x01
|
||||
|
||||
/* register definitions */
|
||||
#define HDMI_CTXSW 0x00
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user