AcoSail/kernel_optimize_test
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ARM: use read_cpuid_id() instead of read_cpuid(CPUID_ID)

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Both calls are identical currently. This patch prepares to deprecate
read_cpuid on machines without cp15.

Also move an unconditional usage of read_cpuid_cachetype to a more local
scope as read_cpuid_cachetype uses read_cpuid, too.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Message-Id: 1359646587-1788-1-git-send-email-u.kleine-koenig@pengutronix.de
This commit is contained in:
Uwe Kleine-König 2013-01-30 17:38:21 +01:00
parent 473296e072
commit ac52e83f4c
4 changed files with 5 additions and 5 deletions
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2
arch/arm/kernel/setup.c
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@ -291,10 +291,10 @@ static int cpu_has_aliasing_icache(unsigned int arch)
static void __init cacheid_init(void) static void __init cacheid_init(void)
{ {
unsigned int cachetype = read_cpuid_cachetype();
unsigned int arch = cpu_architecture(); unsigned int arch = cpu_architecture();
if (arch >= CPU_ARCH_ARMv6) { if (arch >= CPU_ARCH_ARMv6) {
unsigned int cachetype = read_cpuid_cachetype();
if ((cachetype & (7 << 29)) == 4 << 29) { if ((cachetype & (7 << 29)) == 4 << 29) {
/* ARMv7 register format */ /* ARMv7 register format */
arch = CPU_ARCH_ARMv7; arch = CPU_ARCH_ARMv7;

2
arch/arm/kernel/smp_scu.c
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@ -41,7 +41,7 @@ void scu_enable(void __iomem *scu_base)
#ifdef CONFIG_ARM_ERRATA_764369 #ifdef CONFIG_ARM_ERRATA_764369
/* Cortex-A9 only */ /* Cortex-A9 only */
if ((read_cpuid(CPUID_ID) & 0xff0ffff0) == 0x410fc090) { if ((read_cpuid_id() & 0xff0ffff0) == 0x410fc090) {
scu_ctrl = __raw_readl(scu_base + 0x30); scu_ctrl = __raw_readl(scu_base + 0x30);
if (!(scu_ctrl & 1)) if (!(scu_ctrl & 1))
__raw_writel(scu_ctrl | 0x1, scu_base + 0x30); __raw_writel(scu_ctrl | 0x1, scu_base + 0x30);

4
arch/arm/mach-omap2/id.c
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@ -300,7 +300,7 @@ void __init omap3xxx_check_revision(void)
* If the processor type is Cortex-A8 and the revision is 0x0 * If the processor type is Cortex-A8 and the revision is 0x0
* it means its Cortex r0p0 which is 3430 ES1.0. * it means its Cortex r0p0 which is 3430 ES1.0.
*/ */
cpuid = read_cpuid(CPUID_ID); cpuid = read_cpuid_id();
if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) { if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
omap_revision = OMAP3430_REV_ES1_0; omap_revision = OMAP3430_REV_ES1_0;
cpu_rev = "1.0"; cpu_rev = "1.0";
@ -450,7 +450,7 @@ void __init omap4xxx_check_revision(void)
* Use ARM register to detect the correct ES version * Use ARM register to detect the correct ES version
*/ */
if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) { if (!rev && (hawkeye != 0xb94e) && (hawkeye != 0xb975)) {
idcode = read_cpuid(CPUID_ID); idcode = read_cpuid_id();
rev = (idcode & 0xf) - 1; rev = (idcode & 0xf) - 1;
} }

2
arch/arm/mach-omap2/omap-smp.c
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@ -209,7 +209,7 @@ static void __init omap4_smp_init_cpus(void)
unsigned int i = 0, ncores = 1, cpu_id; unsigned int i = 0, ncores = 1, cpu_id;
/* Use ARM cpuid check here, as SoC detection will not work so early */ /* Use ARM cpuid check here, as SoC detection will not work so early */
cpu_id = read_cpuid(CPUID_ID) & CPU_MASK; cpu_id = read_cpuid_id() & CPU_MASK;
if (cpu_id == CPU_CORTEX_A9) { if (cpu_id == CPU_CORTEX_A9) {
/* /*
* Currently we can't call ioremap here because * Currently we can't call ioremap here because