forked from luck/tmp_suning_uos_patched
ARM: OMAP2: Powerdomain: Add base OMAP2/3 powerdomain code
This patch creates an interface to the powerdomain registers in the PRM/CM modules on OMAP2/3. This interface is intended to be used by PM code, e.g., pm.c; not by device drivers directly. Each powerdomain will be defined in later patches as static structures. Also defined are dependencies between powerdomains, used for adding and removing PM_WKDEP and CM_SLEEPDEP bits. The powerdomain structures are linked into a list at boot by pwrdm_register(), similar to the OMAP clock code. The patch adds a Kconfig option, CONFIG_OMAP_DEBUG_POWERDOMAIN, which when enabled will emit verbose debug messages via pr_debug(). Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Paul Walmsley
Tony Lindgren
parent
1fca254274
commit
ad67ef6848
@ -4,7 +4,7 @@
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# Common support
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obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \
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devices.o serial.o gpmc.o timer-gp.o
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devices.o serial.o gpmc.o timer-gp.o powerdomain.o
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obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
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@ -62,11 +62,14 @@ static void omap3_dpll_recalc(struct clk *clk)
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static void _omap3_dpll_write_clken(struct clk *clk, u8 clken_bits)
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{
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const struct dpll_data *dd;
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u32 v;
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dd = clk->dpll_data;
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cm_rmw_reg_bits(dd->enable_mask, clken_bits << __ffs(dd->enable_mask),
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dd->control_reg);
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v = __raw_readl(dd->control_reg);
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v &= ~dd->enable_mask;
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v |= clken_bits << __ffs(dd->enable_mask);
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__raw_writel(v, dd->control_reg);
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}
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/* _omap3_wait_dpll_status: wait for a DPLL to enter a specific state */
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@ -82,7 +85,7 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state)
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state <<= dd->idlest_bit;
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idlest_mask = 1 << dd->idlest_bit;
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while (((cm_read_reg(dd->idlest_reg) & idlest_mask) != state) &&
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while (((__raw_readl(dd->idlest_reg) & idlest_mask) != state) &&
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i < MAX_DPLL_WAIT_TRIES) {
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i++;
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udelay(1);
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@ -285,7 +288,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk)
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dd = clk->dpll_data;
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v = cm_read_reg(dd->autoidle_reg);
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v = __raw_readl(dd->autoidle_reg);
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v &= dd->autoidle_mask;
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v >>= __ffs(dd->autoidle_mask);
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@ -304,6 +307,7 @@ static u32 omap3_dpll_autoidle_read(struct clk *clk)
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static void omap3_dpll_allow_idle(struct clk *clk)
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{
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const struct dpll_data *dd;
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u32 v;
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if (!clk || !clk->dpll_data)
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return;
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@ -315,9 +319,10 @@ static void omap3_dpll_allow_idle(struct clk *clk)
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* by writing 0x5 instead of 0x1. Add some mechanism to
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* optionally enter this mode.
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*/
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cm_rmw_reg_bits(dd->autoidle_mask,
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DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask),
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dd->autoidle_reg);
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v = __raw_readl(dd->autoidle_reg);
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v &= ~dd->autoidle_mask;
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v |= DPLL_AUTOIDLE_LOW_POWER_STOP << __ffs(dd->autoidle_mask);
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__raw_writel(v, dd->autoidle_reg);
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}
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/**
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@ -329,15 +334,17 @@ static void omap3_dpll_allow_idle(struct clk *clk)
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static void omap3_dpll_deny_idle(struct clk *clk)
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{
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const struct dpll_data *dd;
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u32 v;
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if (!clk || !clk->dpll_data)
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return;
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dd = clk->dpll_data;
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cm_rmw_reg_bits(dd->autoidle_mask,
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DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask),
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dd->autoidle_reg);
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v = __raw_readl(dd->autoidle_reg);
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v &= ~dd->autoidle_mask;
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v |= DPLL_AUTOIDLE_DISABLE << __ffs(dd->autoidle_mask);
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__raw_writel(v, dd->autoidle_reg);
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}
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/* Clock control for DPLL outputs */
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909
arch/arm/mach-omap2/powerdomain.c
Normal file
909
arch/arm/mach-omap2/powerdomain.c
Normal file
@ -0,0 +1,909 @@
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/*
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* OMAP powerdomain control
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*
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* Copyright (C) 2007-2008 Texas Instruments, Inc.
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* Copyright (C) 2007-2008 Nokia Corporation
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*
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* Written by Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifdef CONFIG_OMAP_DEBUG_POWERDOMAIN
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# define DEBUG
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#endif
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <asm/atomic.h>
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#include "cm.h"
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#include "cm-regbits-34xx.h"
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#include "prm.h"
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#include "prm-regbits-34xx.h"
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#include <mach/cpu.h>
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#include <mach/powerdomain.h>
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/* pwrdm_list contains all registered struct powerdomains */
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static LIST_HEAD(pwrdm_list);
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/*
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* pwrdm_rwlock protects pwrdm_list add and del ops - also reused to
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* protect pwrdm_clkdms[] during clkdm add/del ops
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*/
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static DEFINE_RWLOCK(pwrdm_rwlock);
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/* Private functions */
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static u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
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{
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u32 v;
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v = prm_read_mod_reg(domain, idx);
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v &= mask;
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v >>= __ffs(mask);
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return v;
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}
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static struct powerdomain *_pwrdm_lookup(const char *name)
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{
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struct powerdomain *pwrdm, *temp_pwrdm;
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pwrdm = NULL;
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list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
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if (!strcmp(name, temp_pwrdm->name)) {
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pwrdm = temp_pwrdm;
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break;
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}
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}
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return pwrdm;
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}
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/* _pwrdm_deps_lookup - look up the specified powerdomain in a pwrdm list */
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static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
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struct pwrdm_dep *deps)
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{
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struct pwrdm_dep *pd;
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if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip))
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return ERR_PTR(-EINVAL);
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for (pd = deps; pd; pd++) {
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if (!omap_chip_is(pd->omap_chip))
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continue;
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if (!pd->pwrdm && pd->pwrdm_name)
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pd->pwrdm = pwrdm_lookup(pd->pwrdm_name);
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if (pd->pwrdm == pwrdm)
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break;
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}
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if (!pd)
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return ERR_PTR(-ENOENT);
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return pd->pwrdm;
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}
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/* Public functions */
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/**
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* pwrdm_init - set up the powerdomain layer
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*
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* Loop through the list of powerdomains, registering all that are
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* available on the current CPU. If pwrdm_list is supplied and not
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* null, all of the referenced powerdomains will be registered. No
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* return value.
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*/
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void pwrdm_init(struct powerdomain **pwrdm_list)
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{
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struct powerdomain **p = NULL;
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if (pwrdm_list)
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for (p = pwrdm_list; *p; p++)
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pwrdm_register(*p);
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}
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/**
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* pwrdm_register - register a powerdomain
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* @pwrdm: struct powerdomain * to register
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*
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* Adds a powerdomain to the internal powerdomain list. Returns
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* -EINVAL if given a null pointer, -EEXIST if a powerdomain is
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* already registered by the provided name, or 0 upon success.
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*/
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int pwrdm_register(struct powerdomain *pwrdm)
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{
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unsigned long flags;
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int ret = -EINVAL;
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if (!pwrdm)
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return -EINVAL;
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if (!omap_chip_is(pwrdm->omap_chip))
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return -EINVAL;
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write_lock_irqsave(&pwrdm_rwlock, flags);
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if (_pwrdm_lookup(pwrdm->name)) {
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ret = -EEXIST;
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goto pr_unlock;
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}
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list_add(&pwrdm->node, &pwrdm_list);
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pr_debug("powerdomain: registered %s\n", pwrdm->name);
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ret = 0;
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pr_unlock:
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write_unlock_irqrestore(&pwrdm_rwlock, flags);
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return ret;
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}
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/**
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* pwrdm_unregister - unregister a powerdomain
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* @pwrdm: struct powerdomain * to unregister
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*
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* Removes a powerdomain from the internal powerdomain list. Returns
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* -EINVAL if pwrdm argument is NULL.
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*/
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int pwrdm_unregister(struct powerdomain *pwrdm)
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{
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unsigned long flags;
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if (!pwrdm)
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return -EINVAL;
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write_lock_irqsave(&pwrdm_rwlock, flags);
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list_del(&pwrdm->node);
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write_unlock_irqrestore(&pwrdm_rwlock, flags);
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pr_debug("powerdomain: unregistered %s\n", pwrdm->name);
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return 0;
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}
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/**
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* pwrdm_lookup - look up a powerdomain by name, return a pointer
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* @name: name of powerdomain
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*
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* Find a registered powerdomain by its name. Returns a pointer to the
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* struct powerdomain if found, or NULL otherwise.
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*/
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struct powerdomain *pwrdm_lookup(const char *name)
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{
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struct powerdomain *pwrdm;
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unsigned long flags;
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if (!name)
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return NULL;
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read_lock_irqsave(&pwrdm_rwlock, flags);
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pwrdm = _pwrdm_lookup(name);
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read_unlock_irqrestore(&pwrdm_rwlock, flags);
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return pwrdm;
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}
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/**
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* pwrdm_for_each - call function on each registered clockdomain
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* @fn: callback function *
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*
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* Call the supplied function for each registered powerdomain. The
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* callback function can return anything but 0 to bail out early from
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* the iterator. The callback function is called with the pwrdm_rwlock
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* held for reading, so no powerdomain structure manipulation
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* functions should be called from the callback, although hardware
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* powerdomain control functions are fine. Returns the last return
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* value of the callback function, which should be 0 for success or
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* anything else to indicate failure; or -EINVAL if the function
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* pointer is null.
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*/
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int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
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{
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struct powerdomain *temp_pwrdm;
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unsigned long flags;
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int ret = 0;
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if (!fn)
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return -EINVAL;
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read_lock_irqsave(&pwrdm_rwlock, flags);
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list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
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ret = (*fn)(temp_pwrdm);
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if (ret)
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break;
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}
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read_unlock_irqrestore(&pwrdm_rwlock, flags);
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return ret;
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}
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/**
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* pwrdm_add_wkdep - add a wakeup dependency from pwrdm2 to pwrdm1
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* @pwrdm1: wake this struct powerdomain * up (dependent)
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* @pwrdm2: when this struct powerdomain * wakes up (source)
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*
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* When the powerdomain represented by pwrdm2 wakes up (due to an
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* interrupt), wake up pwrdm1. Implemented in hardware on the OMAP,
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* this feature is designed to reduce wakeup latency of the dependent
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* powerdomain. Returns -EINVAL if presented with invalid powerdomain
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* pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or
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* 0 upon success.
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*/
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int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
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{
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struct powerdomain *p;
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if (!pwrdm1)
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return -EINVAL;
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p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs);
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if (IS_ERR(p)) {
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pr_debug("powerdomain: hardware cannot set/clear wake up of "
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"%s when %s wakes up\n", pwrdm1->name, pwrdm2->name);
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return IS_ERR(p);
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}
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pr_debug("powerdomain: hardware will wake up %s when %s wakes up\n",
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pwrdm1->name, pwrdm2->name);
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prm_set_mod_reg_bits((1 << pwrdm2->dep_bit),
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pwrdm1->prcm_offs, PM_WKDEP);
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return 0;
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}
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/**
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* pwrdm_del_wkdep - remove a wakeup dependency from pwrdm2 to pwrdm1
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* @pwrdm1: wake this struct powerdomain * up (dependent)
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* @pwrdm2: when this struct powerdomain * wakes up (source)
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*
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* Remove a wakeup dependency that causes pwrdm1 to wake up when pwrdm2
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* wakes up. Returns -EINVAL if presented with invalid powerdomain
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* pointers, -ENOENT if pwrdm2 cannot wake up pwrdm1 in hardware, or
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* 0 upon success.
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*/
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int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
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{
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struct powerdomain *p;
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if (!pwrdm1)
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return -EINVAL;
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p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs);
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if (IS_ERR(p)) {
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pr_debug("powerdomain: hardware cannot set/clear wake up of "
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"%s when %s wakes up\n", pwrdm1->name, pwrdm2->name);
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return IS_ERR(p);
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}
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pr_debug("powerdomain: hardware will no longer wake up %s after %s "
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"wakes up\n", pwrdm1->name, pwrdm2->name);
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prm_clear_mod_reg_bits((1 << pwrdm2->dep_bit),
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pwrdm1->prcm_offs, PM_WKDEP);
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return 0;
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}
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/**
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* pwrdm_read_wkdep - read wakeup dependency state from pwrdm2 to pwrdm1
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* @pwrdm1: wake this struct powerdomain * up (dependent)
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* @pwrdm2: when this struct powerdomain * wakes up (source)
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*
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* Return 1 if a hardware wakeup dependency exists wherein pwrdm1 will be
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* awoken when pwrdm2 wakes up; 0 if dependency is not set; -EINVAL
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* if either powerdomain pointer is invalid; or -ENOENT if the hardware
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* is incapable.
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*
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* REVISIT: Currently this function only represents software-controllable
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* wakeup dependencies. Wakeup dependencies fixed in hardware are not
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* yet handled here.
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*/
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int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
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{
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struct powerdomain *p;
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if (!pwrdm1)
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return -EINVAL;
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p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->wkdep_srcs);
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if (IS_ERR(p)) {
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pr_debug("powerdomain: hardware cannot set/clear wake up of "
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"%s when %s wakes up\n", pwrdm1->name, pwrdm2->name);
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return IS_ERR(p);
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}
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return prm_read_mod_bits_shift(pwrdm1->prcm_offs, PM_WKDEP,
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(1 << pwrdm2->dep_bit));
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}
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/**
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* pwrdm_add_sleepdep - add a sleep dependency from pwrdm2 to pwrdm1
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* @pwrdm1: prevent this struct powerdomain * from sleeping (dependent)
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* @pwrdm2: when this struct powerdomain * is active (source)
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*
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* Prevent pwrdm1 from automatically going inactive (and then to
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* retention or off) if pwrdm2 is still active. Returns -EINVAL if
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* presented with invalid powerdomain pointers or called on a machine
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* that does not support software-configurable hardware sleep dependencies,
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* -ENOENT if the specified dependency cannot be set in hardware, or
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* 0 upon success.
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*/
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int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
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{
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struct powerdomain *p;
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if (!pwrdm1)
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return -EINVAL;
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if (!cpu_is_omap34xx())
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return -EINVAL;
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p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs);
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if (IS_ERR(p)) {
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pr_debug("powerdomain: hardware cannot set/clear sleep "
|
||||
"dependency affecting %s from %s\n", pwrdm1->name,
|
||||
pwrdm2->name);
|
||||
return IS_ERR(p);
|
||||
}
|
||||
|
||||
pr_debug("powerdomain: will prevent %s from sleeping if %s is active\n",
|
||||
pwrdm1->name, pwrdm2->name);
|
||||
|
||||
cm_set_mod_reg_bits((1 << pwrdm2->dep_bit),
|
||||
pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_del_sleepdep - remove a sleep dependency from pwrdm2 to pwrdm1
|
||||
* @pwrdm1: prevent this struct powerdomain * from sleeping (dependent)
|
||||
* @pwrdm2: when this struct powerdomain * is active (source)
|
||||
*
|
||||
* Allow pwrdm1 to automatically go inactive (and then to retention or
|
||||
* off), independent of the activity state of pwrdm2. Returns -EINVAL
|
||||
* if presented with invalid powerdomain pointers or called on a machine
|
||||
* that does not support software-configurable hardware sleep dependencies,
|
||||
* -ENOENT if the specified dependency cannot be cleared in hardware, or
|
||||
* 0 upon success.
|
||||
*/
|
||||
int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
|
||||
{
|
||||
struct powerdomain *p;
|
||||
|
||||
if (!pwrdm1)
|
||||
return -EINVAL;
|
||||
|
||||
if (!cpu_is_omap34xx())
|
||||
return -EINVAL;
|
||||
|
||||
p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs);
|
||||
if (IS_ERR(p)) {
|
||||
pr_debug("powerdomain: hardware cannot set/clear sleep "
|
||||
"dependency affecting %s from %s\n", pwrdm1->name,
|
||||
pwrdm2->name);
|
||||
return IS_ERR(p);
|
||||
}
|
||||
|
||||
pr_debug("powerdomain: will no longer prevent %s from sleeping if "
|
||||
"%s is active\n", pwrdm1->name, pwrdm2->name);
|
||||
|
||||
cm_clear_mod_reg_bits((1 << pwrdm2->dep_bit),
|
||||
pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_sleepdep - read sleep dependency state from pwrdm2 to pwrdm1
|
||||
* @pwrdm1: prevent this struct powerdomain * from sleeping (dependent)
|
||||
* @pwrdm2: when this struct powerdomain * is active (source)
|
||||
*
|
||||
* Return 1 if a hardware sleep dependency exists wherein pwrdm1 will
|
||||
* not be allowed to automatically go inactive if pwrdm2 is active;
|
||||
* 0 if pwrdm1's automatic power state inactivity transition is independent
|
||||
* of pwrdm2's; -EINVAL if either powerdomain pointer is invalid or called
|
||||
* on a machine that does not support software-configurable hardware sleep
|
||||
* dependencies; or -ENOENT if the hardware is incapable.
|
||||
*
|
||||
* REVISIT: Currently this function only represents software-controllable
|
||||
* sleep dependencies. Sleep dependencies fixed in hardware are not
|
||||
* yet handled here.
|
||||
*/
|
||||
int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2)
|
||||
{
|
||||
struct powerdomain *p;
|
||||
|
||||
if (!pwrdm1)
|
||||
return -EINVAL;
|
||||
|
||||
if (!cpu_is_omap34xx())
|
||||
return -EINVAL;
|
||||
|
||||
p = _pwrdm_deps_lookup(pwrdm2, pwrdm1->sleepdep_srcs);
|
||||
if (IS_ERR(p)) {
|
||||
pr_debug("powerdomain: hardware cannot set/clear sleep "
|
||||
"dependency affecting %s from %s\n", pwrdm1->name,
|
||||
pwrdm2->name);
|
||||
return IS_ERR(p);
|
||||
}
|
||||
|
||||
return prm_read_mod_bits_shift(pwrdm1->prcm_offs, OMAP3430_CM_SLEEPDEP,
|
||||
(1 << pwrdm2->dep_bit));
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
|
||||
* @pwrdm: struct powerdomain *
|
||||
*
|
||||
* Return the number of controllable memory banks in powerdomain pwrdm,
|
||||
* starting with 1. Returns -EINVAL if the powerdomain pointer is null.
|
||||
*/
|
||||
int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
return pwrdm->banks;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_set_next_pwrst - set next powerdomain power state
|
||||
* @pwrdm: struct powerdomain * to set
|
||||
* @pwrst: one of the PWRDM_POWER_* macros
|
||||
*
|
||||
* Set the powerdomain pwrdm's next power state to pwrst. The powerdomain
|
||||
* may not enter this state immediately if the preconditions for this state
|
||||
* have not been satisfied. Returns -EINVAL if the powerdomain pointer is
|
||||
* null or if the power state is invalid for the powerdomin, or returns 0
|
||||
* upon success.
|
||||
*/
|
||||
int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
if (!(pwrdm->pwrsts & (1 << pwrst)))
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("powerdomain: setting next powerstate for %s to %0x\n",
|
||||
pwrdm->name, pwrst);
|
||||
|
||||
prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
|
||||
(pwrst << OMAP_POWERSTATE_SHIFT),
|
||||
pwrdm->prcm_offs, PM_PWSTCTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_next_pwrst - get next powerdomain power state
|
||||
* @pwrdm: struct powerdomain * to get power state
|
||||
*
|
||||
* Return the powerdomain pwrdm's next power state. Returns -EINVAL
|
||||
* if the powerdomain pointer is null or returns the next power state
|
||||
* upon success.
|
||||
*/
|
||||
int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTCTRL,
|
||||
OMAP_POWERSTATE_MASK);
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_pwrst - get current powerdomain power state
|
||||
* @pwrdm: struct powerdomain * to get power state
|
||||
*
|
||||
* Return the powerdomain pwrdm's current power state. Returns -EINVAL
|
||||
* if the powerdomain pointer is null or returns the current power state
|
||||
* upon success.
|
||||
*/
|
||||
int pwrdm_read_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST,
|
||||
OMAP_POWERSTATEST_MASK);
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_prev_pwrst - get previous powerdomain power state
|
||||
* @pwrdm: struct powerdomain * to get previous power state
|
||||
*
|
||||
* Return the powerdomain pwrdm's previous power state. Returns -EINVAL
|
||||
* if the powerdomain pointer is null or returns the previous power state
|
||||
* upon success.
|
||||
*/
|
||||
int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
|
||||
OMAP3430_LASTPOWERSTATEENTERED_MASK);
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_set_logic_retst - set powerdomain logic power state upon retention
|
||||
* @pwrdm: struct powerdomain * to set
|
||||
* @pwrst: one of the PWRDM_POWER_* macros
|
||||
*
|
||||
* Set the next power state that the logic portion of the powerdomain
|
||||
* pwrdm will enter when the powerdomain enters retention. This will
|
||||
* be either RETENTION or OFF, if supported. Returns -EINVAL if the
|
||||
* powerdomain pointer is null or the target power state is not not
|
||||
* supported, or returns 0 upon success.
|
||||
*/
|
||||
int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst)))
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n",
|
||||
pwrdm->name, pwrst);
|
||||
|
||||
/*
|
||||
* The register bit names below may not correspond to the
|
||||
* actual names of the bits in each powerdomain's register,
|
||||
* but the type of value returned is the same for each
|
||||
* powerdomain.
|
||||
*/
|
||||
prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE,
|
||||
(pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE)),
|
||||
pwrdm->prcm_offs, PM_PWSTCTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_set_mem_onst - set memory power state while powerdomain ON
|
||||
* @pwrdm: struct powerdomain * to set
|
||||
* @bank: memory bank number to set (0-3)
|
||||
* @pwrst: one of the PWRDM_POWER_* macros
|
||||
*
|
||||
* Set the next power state that memory bank x of the powerdomain
|
||||
* pwrdm will enter when the powerdomain enters the ON state. Bank
|
||||
* will be a number from 0 to 3, and represents different types of
|
||||
* memory, depending on the powerdomain. Returns -EINVAL if the
|
||||
* powerdomain pointer is null or the target power state is not not
|
||||
* supported for this memory bank, -EEXIST if the target memory bank
|
||||
* does not exist or is not controllable, or returns 0 upon success.
|
||||
*/
|
||||
int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
|
||||
{
|
||||
u32 m;
|
||||
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
if (pwrdm->banks < (bank + 1))
|
||||
return -EEXIST;
|
||||
|
||||
if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst)))
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("powerdomain: setting next memory powerstate for domain %s "
|
||||
"bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst);
|
||||
|
||||
/*
|
||||
* The register bit names below may not correspond to the
|
||||
* actual names of the bits in each powerdomain's register,
|
||||
* but the type of value returned is the same for each
|
||||
* powerdomain.
|
||||
*/
|
||||
switch (bank) {
|
||||
case 0:
|
||||
m = OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK;
|
||||
break;
|
||||
case 1:
|
||||
m = OMAP3430_L1FLATMEMONSTATE_MASK;
|
||||
break;
|
||||
case 2:
|
||||
m = OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK;
|
||||
break;
|
||||
case 3:
|
||||
m = OMAP3430_L2FLATMEMONSTATE_MASK;
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1); /* should never happen */
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)),
|
||||
pwrdm->prcm_offs, PM_PWSTCTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_set_mem_retst - set memory power state while powerdomain in RET
|
||||
* @pwrdm: struct powerdomain * to set
|
||||
* @bank: memory bank number to set (0-3)
|
||||
* @pwrst: one of the PWRDM_POWER_* macros
|
||||
*
|
||||
* Set the next power state that memory bank x of the powerdomain
|
||||
* pwrdm will enter when the powerdomain enters the RETENTION state.
|
||||
* Bank will be a number from 0 to 3, and represents different types
|
||||
* of memory, depending on the powerdomain. pwrst will be either
|
||||
* RETENTION or OFF, if supported. Returns -EINVAL if the powerdomain
|
||||
* pointer is null or the target power state is not not supported for
|
||||
* this memory bank, -EEXIST if the target memory bank does not exist
|
||||
* or is not controllable, or returns 0 upon success.
|
||||
*/
|
||||
int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
|
||||
{
|
||||
u32 m;
|
||||
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
if (pwrdm->banks < (bank + 1))
|
||||
return -EEXIST;
|
||||
|
||||
if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst)))
|
||||
return -EINVAL;
|
||||
|
||||
pr_debug("powerdomain: setting next memory powerstate for domain %s "
|
||||
"bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst);
|
||||
|
||||
/*
|
||||
* The register bit names below may not correspond to the
|
||||
* actual names of the bits in each powerdomain's register,
|
||||
* but the type of value returned is the same for each
|
||||
* powerdomain.
|
||||
*/
|
||||
switch (bank) {
|
||||
case 0:
|
||||
m = OMAP3430_SHAREDL1CACHEFLATRETSTATE;
|
||||
break;
|
||||
case 1:
|
||||
m = OMAP3430_L1FLATMEMRETSTATE;
|
||||
break;
|
||||
case 2:
|
||||
m = OMAP3430_SHAREDL2CACHEFLATRETSTATE;
|
||||
break;
|
||||
case 3:
|
||||
m = OMAP3430_L2FLATMEMRETSTATE;
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1); /* should never happen */
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
|
||||
PM_PWSTCTRL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_logic_pwrst - get current powerdomain logic retention power state
|
||||
* @pwrdm: struct powerdomain * to get current logic retention power state
|
||||
*
|
||||
* Return the current power state that the logic portion of
|
||||
* powerdomain pwrdm will enter
|
||||
* Returns -EINVAL if the powerdomain pointer is null or returns the
|
||||
* current logic retention power state upon success.
|
||||
*/
|
||||
int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST,
|
||||
OMAP3430_LOGICSTATEST);
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_prev_logic_pwrst - get previous powerdomain logic power state
|
||||
* @pwrdm: struct powerdomain * to get previous logic power state
|
||||
*
|
||||
* Return the powerdomain pwrdm's logic power state. Returns -EINVAL
|
||||
* if the powerdomain pointer is null or returns the previous logic
|
||||
* power state upon success.
|
||||
*/
|
||||
int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* The register bit names below may not correspond to the
|
||||
* actual names of the bits in each powerdomain's register,
|
||||
* but the type of value returned is the same for each
|
||||
* powerdomain.
|
||||
*/
|
||||
return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
|
||||
OMAP3430_LASTLOGICSTATEENTERED);
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_mem_pwrst - get current memory bank power state
|
||||
* @pwrdm: struct powerdomain * to get current memory bank power state
|
||||
* @bank: memory bank number (0-3)
|
||||
*
|
||||
* Return the powerdomain pwrdm's current memory power state for bank
|
||||
* x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
|
||||
* the target memory bank does not exist or is not controllable, or
|
||||
* returns the current memory power state upon success.
|
||||
*/
|
||||
int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
|
||||
{
|
||||
u32 m;
|
||||
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
if (pwrdm->banks < (bank + 1))
|
||||
return -EEXIST;
|
||||
|
||||
/*
|
||||
* The register bit names below may not correspond to the
|
||||
* actual names of the bits in each powerdomain's register,
|
||||
* but the type of value returned is the same for each
|
||||
* powerdomain.
|
||||
*/
|
||||
switch (bank) {
|
||||
case 0:
|
||||
m = OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK;
|
||||
break;
|
||||
case 1:
|
||||
m = OMAP3430_L1FLATMEMSTATEST_MASK;
|
||||
break;
|
||||
case 2:
|
||||
m = OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK;
|
||||
break;
|
||||
case 3:
|
||||
m = OMAP3430_L2FLATMEMSTATEST_MASK;
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1); /* should never happen */
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
return prm_read_mod_bits_shift(pwrdm->prcm_offs, PM_PWSTST, m);
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_read_prev_mem_pwrst - get previous memory bank power state
|
||||
* @pwrdm: struct powerdomain * to get previous memory bank power state
|
||||
* @bank: memory bank number (0-3)
|
||||
*
|
||||
* Return the powerdomain pwrdm's previous memory power state for bank
|
||||
* x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
|
||||
* the target memory bank does not exist or is not controllable, or
|
||||
* returns the previous memory power state upon success.
|
||||
*/
|
||||
int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
|
||||
{
|
||||
u32 m;
|
||||
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
if (pwrdm->banks < (bank + 1))
|
||||
return -EEXIST;
|
||||
|
||||
/*
|
||||
* The register bit names below may not correspond to the
|
||||
* actual names of the bits in each powerdomain's register,
|
||||
* but the type of value returned is the same for each
|
||||
* powerdomain.
|
||||
*/
|
||||
switch (bank) {
|
||||
case 0:
|
||||
m = OMAP3430_LASTMEM1STATEENTERED_MASK;
|
||||
break;
|
||||
case 1:
|
||||
m = OMAP3430_LASTMEM2STATEENTERED_MASK;
|
||||
break;
|
||||
case 2:
|
||||
m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
|
||||
break;
|
||||
case 3:
|
||||
m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1); /* should never happen */
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
return prm_read_mod_bits_shift(pwrdm->prcm_offs,
|
||||
OMAP3430_PM_PREPWSTST, m);
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm
|
||||
* @pwrdm: struct powerdomain * to clear
|
||||
*
|
||||
* Clear the powerdomain's previous power state register. Clears the
|
||||
* entire register, including logic and memory bank previous power states.
|
||||
* Returns -EINVAL if the powerdomain pointer is null, or returns 0 upon
|
||||
* success.
|
||||
*/
|
||||
int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
|
||||
{
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* XXX should get the powerdomain's current state here;
|
||||
* warn & fail if it is not ON.
|
||||
*/
|
||||
|
||||
pr_debug("powerdomain: clearing previous power state reg for %s\n",
|
||||
pwrdm->name);
|
||||
|
||||
prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* pwrdm_wait_transition - wait for powerdomain power transition to finish
|
||||
* @pwrdm: struct powerdomain * to wait for
|
||||
*
|
||||
* If the powerdomain pwrdm is in the process of a state transition,
|
||||
* spin until it completes the power transition, or until an iteration
|
||||
* bailout value is reached. Returns -EINVAL if the powerdomain
|
||||
* pointer is null, -EAGAIN if the bailout value was reached, or
|
||||
* returns 0 upon success.
|
||||
*/
|
||||
int pwrdm_wait_transition(struct powerdomain *pwrdm)
|
||||
{
|
||||
u32 c = 0;
|
||||
|
||||
if (!pwrdm)
|
||||
return -EINVAL;
|
||||
|
||||
/*
|
||||
* REVISIT: pwrdm_wait_transition() may be better implemented
|
||||
* via a callback and a periodic timer check -- how long do we expect
|
||||
* powerdomain transitions to take?
|
||||
*/
|
||||
|
||||
/* XXX Is this udelay() value meaningful? */
|
||||
while ((prm_read_mod_reg(pwrdm->prcm_offs, PM_PWSTST) &
|
||||
OMAP_INTRANSITION) &&
|
||||
(c++ < PWRDM_TRANSITION_BAILOUT))
|
||||
udelay(1);
|
||||
|
||||
if (c >= PWRDM_TRANSITION_BAILOUT) {
|
||||
printk(KERN_ERR "powerdomain: waited too long for "
|
||||
"powerdomain %s to complete transition\n", pwrdm->name);
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
pr_debug("powerdomain: completed transition in %d loops\n", c);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -29,6 +29,18 @@ config OMAP_DEBUG_LEDS
|
||||
depends on OMAP_DEBUG_DEVICES
|
||||
default y if LEDS || LEDS_OMAP_DEBUG
|
||||
|
||||
config OMAP_DEBUG_POWERDOMAIN
|
||||
bool "Emit debug messages from powerdomain layer"
|
||||
depends on ARCH_OMAP2 || ARCH_OMAP3
|
||||
default n
|
||||
help
|
||||
Say Y here if you want to compile in powerdomain layer
|
||||
debugging messages for OMAP2/3. These messages can
|
||||
provide more detail as to why some powerdomain calls
|
||||
may be failing, and will also emit a descriptive message
|
||||
for every powerdomain register write. However, the
|
||||
extra detail costs some memory.
|
||||
|
||||
config OMAP_RESET_CLOCKS
|
||||
bool "Reset unused clocks during boot"
|
||||
depends on ARCH_OMAP
|
||||
|
||||
139
arch/arm/plat-omap/include/mach/powerdomain.h
Normal file
139
arch/arm/plat-omap/include/mach/powerdomain.h
Normal file
@ -0,0 +1,139 @@
|
||||
/*
|
||||
* OMAP2/3 powerdomain control
|
||||
*
|
||||
* Copyright (C) 2007-8 Texas Instruments, Inc.
|
||||
* Copyright (C) 2007-8 Nokia Corporation
|
||||
*
|
||||
* Written by Paul Walmsley
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN
|
||||
#define ASM_ARM_ARCH_OMAP_POWERDOMAIN
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/list.h>
|
||||
|
||||
#include <asm/atomic.h>
|
||||
|
||||
#include <mach/cpu.h>
|
||||
|
||||
|
||||
/* Powerdomain basic power states */
|
||||
#define PWRDM_POWER_OFF 0x0
|
||||
#define PWRDM_POWER_RET 0x1
|
||||
#define PWRDM_POWER_INACTIVE 0x2
|
||||
#define PWRDM_POWER_ON 0x3
|
||||
|
||||
/* Powerdomain allowable state bitfields */
|
||||
#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \
|
||||
(1 << PWRDM_POWER_ON))
|
||||
|
||||
#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \
|
||||
(1 << PWRDM_POWER_RET))
|
||||
|
||||
#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON))
|
||||
|
||||
|
||||
/*
|
||||
* Number of memory banks that are power-controllable. On OMAP3430, the
|
||||
* maximum is 4.
|
||||
*/
|
||||
#define PWRDM_MAX_MEM_BANKS 4
|
||||
|
||||
/* XXX A completely arbitrary number. What is reasonable here? */
|
||||
#define PWRDM_TRANSITION_BAILOUT 100000
|
||||
|
||||
struct powerdomain;
|
||||
|
||||
/* Encodes dependencies between powerdomains - statically defined */
|
||||
struct pwrdm_dep {
|
||||
|
||||
/* Powerdomain name */
|
||||
const char *pwrdm_name;
|
||||
|
||||
/* Powerdomain pointer - resolved by the powerdomain code */
|
||||
struct powerdomain *pwrdm;
|
||||
|
||||
/* Flags to mark OMAP chip restrictions, etc. */
|
||||
const struct omap_chip_id omap_chip;
|
||||
|
||||
};
|
||||
|
||||
struct powerdomain {
|
||||
|
||||
/* Powerdomain name */
|
||||
const char *name;
|
||||
|
||||
/* the address offset from CM_BASE/PRM_BASE */
|
||||
const s16 prcm_offs;
|
||||
|
||||
/* Used to represent the OMAP chip types containing this pwrdm */
|
||||
const struct omap_chip_id omap_chip;
|
||||
|
||||
/* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */
|
||||
const u8 dep_bit;
|
||||
|
||||
/* Powerdomains that can be told to wake this powerdomain up */
|
||||
struct pwrdm_dep *wkdep_srcs;
|
||||
|
||||
/* Powerdomains that can be told to keep this pwrdm from inactivity */
|
||||
struct pwrdm_dep *sleepdep_srcs;
|
||||
|
||||
/* Possible powerdomain power states */
|
||||
const u8 pwrsts;
|
||||
|
||||
/* Possible logic power states when pwrdm in RETENTION */
|
||||
const u8 pwrsts_logic_ret;
|
||||
|
||||
/* Number of software-controllable memory banks in this powerdomain */
|
||||
const u8 banks;
|
||||
|
||||
/* Possible memory bank pwrstates when pwrdm in RETENTION */
|
||||
const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
|
||||
|
||||
/* Possible memory bank pwrstates when pwrdm is ON */
|
||||
const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
|
||||
|
||||
struct list_head node;
|
||||
|
||||
};
|
||||
|
||||
|
||||
void pwrdm_init(struct powerdomain **pwrdm_list);
|
||||
|
||||
int pwrdm_register(struct powerdomain *pwrdm);
|
||||
int pwrdm_unregister(struct powerdomain *pwrdm);
|
||||
struct powerdomain *pwrdm_lookup(const char *name);
|
||||
|
||||
int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
|
||||
|
||||
int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
|
||||
int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
|
||||
int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
|
||||
int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
|
||||
int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
|
||||
int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
|
||||
|
||||
int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
|
||||
|
||||
int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
|
||||
int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
|
||||
int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
|
||||
int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
|
||||
|
||||
int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
|
||||
int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
|
||||
int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
|
||||
|
||||
int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
|
||||
int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
|
||||
int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
|
||||
int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
|
||||
|
||||
int pwrdm_wait_transition(struct powerdomain *pwrdm);
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user