forked from luck/tmp_suning_uos_patched
[PATCH] m68k: basic iomem annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Cc: Roman Zippel <zippel@linux-m68k.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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9a4729118c
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@ -102,7 +102,7 @@ static inline void free_io_area(void *addr)
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*/
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/* Rewritten by Andreas Schwab to remove all races. */
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void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
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void __iomem *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
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{
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struct vm_struct *area;
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unsigned long virtaddr, retaddr;
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@ -121,7 +121,7 @@ void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
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if (MACH_IS_AMIGA) {
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if ((physaddr >= 0x40000000) && (physaddr + size < 0x60000000)
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&& (cacheflag == IOMAP_NOCACHE_SER))
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return (void *)physaddr;
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return (void __iomem *)physaddr;
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}
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#endif
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@ -218,21 +218,21 @@ void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag)
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#endif
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flush_tlb_all();
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return (void *)retaddr;
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return (void __iomem *)retaddr;
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}
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/*
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* Unmap a ioremap()ed region again
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*/
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void iounmap(void *addr)
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void iounmap(void __iomem *addr)
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{
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#ifdef CONFIG_AMIGA
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if ((!MACH_IS_AMIGA) ||
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(((unsigned long)addr < 0x40000000) ||
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((unsigned long)addr > 0x60000000)))
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free_io_area(addr);
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free_io_area((__force void *)addr);
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#else
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free_io_area(addr);
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free_io_area((__force void *)addr);
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#endif
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}
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@ -24,6 +24,7 @@
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#ifdef __KERNEL__
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#include <linux/config.h>
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#include <linux/compiler.h>
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#include <asm/raw_io.h>
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#include <asm/virtconvert.h>
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@ -120,68 +121,68 @@ extern int isa_sex;
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* be compiled in so the case statement will be optimised away
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*/
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static inline u8 *isa_itb(unsigned long addr)
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static inline u8 __iomem *isa_itb(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case Q40_ISA: return (u8 *)Q40_ISA_IO_B(addr);
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case Q40_ISA: return (u8 __iomem *)Q40_ISA_IO_B(addr);
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#endif
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#ifdef CONFIG_GG2
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case GG2_ISA: return (u8 *)GG2_ISA_IO_B(addr);
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case GG2_ISA: return (u8 __iomem *)GG2_ISA_IO_B(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case AG_ISA: return (u8 *)AG_ISA_IO_B(addr);
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case AG_ISA: return (u8 __iomem *)AG_ISA_IO_B(addr);
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#endif
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default: return 0; /* avoid warnings, just in case */
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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static inline u16 *isa_itw(unsigned long addr)
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static inline u16 __iomem *isa_itw(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case Q40_ISA: return (u16 *)Q40_ISA_IO_W(addr);
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case Q40_ISA: return (u16 __iomem *)Q40_ISA_IO_W(addr);
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#endif
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#ifdef CONFIG_GG2
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case GG2_ISA: return (u16 *)GG2_ISA_IO_W(addr);
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case GG2_ISA: return (u16 __iomem *)GG2_ISA_IO_W(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case AG_ISA: return (u16 *)AG_ISA_IO_W(addr);
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case AG_ISA: return (u16 __iomem *)AG_ISA_IO_W(addr);
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#endif
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default: return 0; /* avoid warnings, just in case */
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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static inline u8 *isa_mtb(unsigned long addr)
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static inline u8 __iomem *isa_mtb(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case Q40_ISA: return (u8 *)Q40_ISA_MEM_B(addr);
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case Q40_ISA: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
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#endif
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#ifdef CONFIG_GG2
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case GG2_ISA: return (u8 *)GG2_ISA_MEM_B(addr);
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case GG2_ISA: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case AG_ISA: return (u8 *)addr;
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case AG_ISA: return (u8 __iomem *)addr;
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#endif
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default: return 0; /* avoid warnings, just in case */
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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static inline u16 *isa_mtw(unsigned long addr)
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static inline u16 __iomem *isa_mtw(unsigned long addr)
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{
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switch(ISA_TYPE)
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{
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#ifdef CONFIG_Q40
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case Q40_ISA: return (u16 *)Q40_ISA_MEM_W(addr);
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case Q40_ISA: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
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#endif
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#ifdef CONFIG_GG2
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case GG2_ISA: return (u16 *)GG2_ISA_MEM_W(addr);
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case GG2_ISA: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
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#endif
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#ifdef CONFIG_AMIGA_PCMCIA
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case AG_ISA: return (u16 *)addr;
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case AG_ISA: return (u16 __iomem *)addr;
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#endif
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default: return 0; /* avoid warnings, just in case */
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default: return NULL; /* avoid warnings, just in case */
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}
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}
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@ -326,20 +327,20 @@ static inline void isa_delay(void)
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#define mmiowb()
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static inline void *ioremap(unsigned long physaddr, unsigned long size)
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static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size)
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static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void *ioremap_writethrough(unsigned long physaddr,
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static inline void __iomem *ioremap_writethrough(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
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}
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static inline void *ioremap_fullcache(unsigned long physaddr,
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static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
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@ -19,9 +19,9 @@
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#define IOMAP_NOCACHE_NONSER 2
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#define IOMAP_WRITETHROUGH 3
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extern void iounmap(void *addr);
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extern void iounmap(void __iomem *addr);
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extern void *__ioremap(unsigned long physaddr, unsigned long size,
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extern void __iomem *__ioremap(unsigned long physaddr, unsigned long size,
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int cacheflag);
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extern void __iounmap(void *addr, unsigned long size);
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@ -30,21 +30,21 @@ extern void __iounmap(void *addr, unsigned long size);
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* two accesses to memory, which may be undesirable for some devices.
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*/
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#define in_8(addr) \
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({ u8 __v = (*(volatile u8 *) (addr)); __v; })
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({ u8 __v = (*(__force volatile u8 *) (addr)); __v; })
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#define in_be16(addr) \
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({ u16 __v = (*(volatile u16 *) (addr)); __v; })
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({ u16 __v = (*(__force volatile u16 *) (addr)); __v; })
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#define in_be32(addr) \
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({ u32 __v = (*(volatile u32 *) (addr)); __v; })
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({ u32 __v = (*(__force volatile u32 *) (addr)); __v; })
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#define in_le16(addr) \
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({ u16 __v = le16_to_cpu(*(volatile u16 *) (addr)); __v; })
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({ u16 __v = le16_to_cpu(*(__force volatile u16 *) (addr)); __v; })
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#define in_le32(addr) \
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({ u32 __v = le32_to_cpu(*(volatile u32 *) (addr)); __v; })
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({ u32 __v = le32_to_cpu(*(__force volatile u32 *) (addr)); __v; })
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#define out_8(addr,b) (void)((*(volatile u8 *) (addr)) = (b))
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#define out_be16(addr,w) (void)((*(volatile u16 *) (addr)) = (w))
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#define out_be32(addr,l) (void)((*(volatile u32 *) (addr)) = (l))
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#define out_le16(addr,w) (void)((*(volatile u16 *) (addr)) = cpu_to_le16(w))
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#define out_le32(addr,l) (void)((*(volatile u32 *) (addr)) = cpu_to_le32(l))
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#define out_8(addr,b) (void)((*(__force volatile u8 *) (addr)) = (b))
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#define out_be16(addr,w) (void)((*(__force volatile u16 *) (addr)) = (w))
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#define out_be32(addr,l) (void)((*(__force volatile u32 *) (addr)) = (l))
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#define out_le16(addr,w) (void)((*(__force volatile u16 *) (addr)) = cpu_to_le16(w))
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#define out_le32(addr,l) (void)((*(__force volatile u32 *) (addr)) = cpu_to_le32(l))
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#define raw_inb in_8
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#define raw_inw in_be16
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@ -54,7 +54,7 @@ extern void __iounmap(void *addr, unsigned long size);
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#define raw_outw(val,port) out_be16((port),(val))
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#define raw_outl(val,port) out_be32((port),(val))
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static inline void raw_insb(volatile u8 *port, u8 *buf, unsigned int len)
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static inline void raw_insb(volatile u8 __iomem *port, u8 *buf, unsigned int len)
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{
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unsigned int i;
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@ -62,7 +62,7 @@ static inline void raw_insb(volatile u8 *port, u8 *buf, unsigned int len)
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*buf++ = in_8(port);
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}
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static inline void raw_outsb(volatile u8 *port, const u8 *buf,
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static inline void raw_outsb(volatile u8 __iomem *port, const u8 *buf,
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unsigned int len)
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{
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unsigned int i;
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out_8(port, *buf++);
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}
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static inline void raw_insw(volatile u16 *port, u16 *buf, unsigned int nr)
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static inline void raw_insw(volatile u16 __iomem *port, u16 *buf, unsigned int nr)
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{
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unsigned int tmp;
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}
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}
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static inline void raw_outsw(volatile u16 *port, const u16 *buf,
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static inline void raw_outsw(volatile u16 __iomem *port, const u16 *buf,
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unsigned int nr)
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{
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unsigned int tmp;
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@ -150,7 +150,7 @@ static inline void raw_outsw(volatile u16 *port, const u16 *buf,
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}
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}
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static inline void raw_insl(volatile u32 *port, u32 *buf, unsigned int nr)
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static inline void raw_insl(volatile u32 __iomem *port, u32 *buf, unsigned int nr)
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{
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unsigned int tmp;
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}
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}
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static inline void raw_outsl(volatile u32 *port, const u32 *buf,
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static inline void raw_outsl(volatile u32 __iomem *port, const u32 *buf,
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unsigned int nr)
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{
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unsigned int tmp;
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}
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static inline void raw_insw_swapw(volatile u16 *port, u16 *buf,
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static inline void raw_insw_swapw(volatile u16 __iomem *port, u16 *buf,
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unsigned int nr)
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{
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if ((nr) % 8)
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: "d0", "a0", "a1", "d6");
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}
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static inline void raw_outsw_swapw(volatile u16 *port, const u16 *buf,
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static inline void raw_outsw_swapw(volatile u16 __iomem *port, const u16 *buf,
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unsigned int nr)
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{
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if ((nr) % 8)
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@ -15,24 +15,24 @@
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#define z_memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
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#define z_memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
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static inline void *z_remap_nocache_ser(unsigned long physaddr,
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static inline void __iomem *z_remap_nocache_ser(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
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}
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static inline void *z_remap_nocache_nonser(unsigned long physaddr,
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static inline void __iomem *z_remap_nocache_nonser(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_NOCACHE_NONSER);
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}
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static inline void *z_remap_writethrough(unsigned long physaddr,
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static inline void __iomem *z_remap_writethrough(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
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}
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static inline void *z_remap_fullcache(unsigned long physaddr,
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static inline void __iomem *z_remap_fullcache(unsigned long physaddr,
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unsigned long size)
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{
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return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
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