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m68knommu: fix 5329 ColdFire periphal addressing

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The 5329 ColdFire peripheral IO register addresses are not relative to
the MBAR register. So fix the serial platform setup array and IRQ acking
to use just the direct addresses.

Signed-off-by: Matt Waddel <Matt.Waddel@freescale.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Matt Waddel 2008-12-20 07:16:38 -07:00 committed by Greg Ungerer
parent 05ae6fa318
commit add8240eed
1 changed files with 4 additions and 4 deletions
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8
arch/m68knommu/platform/532x/config.c
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@ -41,15 +41,15 @@ extern unsigned int mcf_timerlevel;
static struct mcf_platform_uart m532x_uart_platform[] = { static struct mcf_platform_uart m532x_uart_platform[] = {
{ {
.mapbase = MCF_MBAR + MCFUART_BASE1, .mapbase = MCFUART_BASE1,
.irq = MCFINT_VECBASE + MCFINT_UART0, .irq = MCFINT_VECBASE + MCFINT_UART0,
}, },
{ {
.mapbase = MCF_MBAR + MCFUART_BASE2, .mapbase = MCFUART_BASE2,
.irq = MCFINT_VECBASE + MCFINT_UART1, .irq = MCFINT_VECBASE + MCFINT_UART1,
}, },
{ {
.mapbase = MCF_MBAR + MCFUART_BASE3, .mapbase = MCFUART_BASE3,
.irq = MCFINT_VECBASE + MCFINT_UART2, .irq = MCFINT_VECBASE + MCFINT_UART2,
}, },
{ }, { },
@ -108,7 +108,7 @@ void mcf_settimericr(unsigned int timer, unsigned int level)
default: irq = 32; icr = MCFSIM_ICR_TIMER1; break; default: irq = 32; icr = MCFSIM_ICR_TIMER1; break;
} }
icrp = (volatile unsigned char *) (MCF_MBAR + icr); icrp = (volatile unsigned char *) (icr);
*icrp = level; *icrp = level;
mcf_enable_irq0(irq); mcf_enable_irq0(irq);
} }