forked from luck/tmp_suning_uos_patched
ARM: integrator: move static ioremapping into PCIv3 driver
Try to make this driver self-contained by moving the ioremapping into the driver. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -304,28 +304,6 @@
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/* KMI definitions are now in include/asm-arm/hardware/amba_kmi.h -- rmk */
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/* ------------------------------------------------------------------------
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* Where in the memory map does PCI live?
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* ------------------------------------------------------------------------
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* This represents a fairly liberal usage of address space. Even though
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* the V3 only has two windows (therefore we need to map stuff on the fly),
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* we maintain the same addresses, even if they're not mapped.
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*
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*/
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#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M to xxx */
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/* unused 256M from A0000000-AFFFFFFF might be used for I2O ???
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*/
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#define PHYS_PCI_IO_BASE 0x60000000 /* 16M to xxx */
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/* unused (128-16)M from B1000000-B7FFFFFF
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*/
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#define PHYS_PCI_CONFIG_BASE 0x61000000 /* 16M to xxx */
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/* unused ((128-16)M - 64K) from XXX
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*/
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#define PHYS_PCI_V3_BASE 0x62000000
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#define PCI_MEMORY_VADDR IOMEM(0xe8000000)
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#define PCI_CONFIG_VADDR IOMEM(0xec000000)
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/* ------------------------------------------------------------------------
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* Integrator Interrupt Controllers
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* ------------------------------------------------------------------------
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@ -56,10 +56,10 @@
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/map.h>
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#include <asm/mach/pci.h>
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#include <asm/mach/time.h>
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#include "common.h"
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#include "pci_v3.h"
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/* Base address to the AP system controller */
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void __iomem *ap_syscon_base;
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@ -77,9 +77,6 @@ void __iomem *ap_syscon_base;
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/*
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* Logical Physical
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* e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M)
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* ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M)
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* fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
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* ef000000 Cache flush
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* f1000000 10000000 Core module registers
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* f1100000 11000000 System controller registers
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@ -128,23 +125,13 @@ static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
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.pfn = __phys_to_pfn(INTEGRATOR_AP_GPIO_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = (unsigned long)PCI_MEMORY_VADDR,
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.pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
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.length = SZ_16M,
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.type = MT_DEVICE
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}, {
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.virtual = (unsigned long)PCI_CONFIG_VADDR,
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.pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
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.length = SZ_16M,
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.type = MT_DEVICE
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}
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};
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static void __init ap_map_io(void)
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{
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iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
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pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
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pci_v3_early_init();
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}
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#ifdef CONFIG_PM
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@ -34,10 +34,28 @@
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#include <mach/platform.h>
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#include <mach/irqs.h>
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#include <asm/mach/map.h>
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#include <asm/signal.h>
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#include <asm/mach/pci.h>
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#include <asm/irq_regs.h>
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#include "pci_v3.h"
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/*
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* Where in the memory map does PCI live?
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*
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* This represents a fairly liberal usage of address space. Even though
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* the V3 only has two windows (therefore we need to map stuff on the fly),
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* we maintain the same addresses, even if they're not mapped.
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*/
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#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M */
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#define PHYS_PCI_IO_BASE 0x60000000 /* 16M */
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#define PHYS_PCI_CONFIG_BASE 0x61000000 /* 16M */
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#define PHYS_PCI_V3_BASE 0x62000000 /* 64K */
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#define PCI_MEMORY_VADDR IOMEM(0xe8000000)
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#define PCI_CONFIG_VADDR IOMEM(0xec000000)
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/*
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* V3 Local Bus to PCI Bridge definitions
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*
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@ -851,7 +869,6 @@ static int __init pci_v3_probe(struct platform_device *pdev)
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return -ENODEV;
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}
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vga_base = (unsigned long)PCI_MEMORY_VADDR;
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pci_common_init(&pci_v3);
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return 0;
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@ -869,3 +886,32 @@ static int __init pci_v3_init(void)
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}
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subsys_initcall(pci_v3_init);
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/*
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* Static mappings for the PCIv3 bridge
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*
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* e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M)
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* ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M)
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* fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M)
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*/
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static struct map_desc pci_v3_io_desc[] __initdata __maybe_unused = {
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{
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.virtual = (unsigned long)PCI_MEMORY_VADDR,
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.pfn = __phys_to_pfn(PHYS_PCI_MEM_BASE),
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.length = SZ_16M,
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.type = MT_DEVICE
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}, {
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.virtual = (unsigned long)PCI_CONFIG_VADDR,
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.pfn = __phys_to_pfn(PHYS_PCI_CONFIG_BASE),
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.length = SZ_16M,
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.type = MT_DEVICE
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}
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};
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int __init pci_v3_early_init(void)
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{
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iotable_init(pci_v3_io_desc, ARRAY_SIZE(pci_v3_io_desc));
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vga_base = (unsigned long)PCI_MEMORY_VADDR;
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pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
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return 0;
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}
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2
arch/arm/mach-integrator/pci_v3.h
Normal file
2
arch/arm/mach-integrator/pci_v3.h
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@ -0,0 +1,2 @@
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/* Simple oneliner include to the PCIv3 early init */
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extern int pci_v3_early_init(void);
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