forked from luck/tmp_suning_uos_patched
sh: Use a per-cpu ASID cache.
Previously this was implemented using a global cache, cache this per-CPU instead and bump up the number of context IDs to match NR_CPUS. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
parent
506b85f411
commit
aec5e0e1c1
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@ -3,7 +3,7 @@
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*
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* CPU init code
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*
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* Copyright (C) 2002, 2003 Paul Mundt
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* Copyright (C) 2002 - 2006 Paul Mundt
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* Copyright (C) 2003 Richard Curnow
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*
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* This file is subject to the terms and conditions of the GNU General Public
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@ -12,6 +12,8 @@
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <asm/mmu_context.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#include <asm/page.h>
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@ -218,6 +220,12 @@ asmlinkage void __init sh_cpu_init(void)
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clear_used_math();
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}
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/*
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* Initialize the per-CPU ASID cache very early, since the
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* TLB flushing routines depend on this being setup.
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*/
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current_cpu_data.asid_cache = NO_CONTEXT;
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#ifdef CONFIG_SH_DSP
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/* Probe for DSP */
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dsp_init();
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@ -240,4 +248,3 @@ asmlinkage void __init sh_cpu_init(void)
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ubc_wakeup();
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#endif
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}
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@ -1,42 +1,30 @@
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/* $Id: process.c,v 1.28 2004/05/05 16:54:23 lethal Exp $
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/*
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* arch/sh/kernel/process.c
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*
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* linux/arch/sh/kernel/process.c
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* This file handles the architecture-dependent parts of process handling..
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*
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* Copyright (C) 1995 Linus Torvalds
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*
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* SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
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* Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC
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* Copyright (C) 2002 - 2006 Paul Mundt
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*/
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/*
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* This file handles the architecture-dependent parts of process handling..
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*/
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#include <linux/module.h>
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#include <linux/unistd.h>
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#include <linux/mm.h>
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#include <linux/elfcore.h>
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#include <linux/a.out.h>
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#include <linux/slab.h>
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#include <linux/pm.h>
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#include <linux/ptrace.h>
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#include <linux/kallsyms.h>
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#include <linux/kexec.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/mmu_context.h>
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#include <asm/elf.h>
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#include <asm/ubc.h>
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static int hlt_counter=0;
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static int hlt_counter;
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int ubc_usercnt = 0;
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#define HARD_IDLE_TIMEOUT (HZ / 3)
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void (*pm_idle)(void);
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void (*pm_power_off)(void);
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EXPORT_SYMBOL(pm_power_off);
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@ -44,14 +32,12 @@ void disable_hlt(void)
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{
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hlt_counter++;
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}
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EXPORT_SYMBOL(disable_hlt);
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void enable_hlt(void)
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{
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hlt_counter--;
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}
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EXPORT_SYMBOL(enable_hlt);
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void default_idle(void)
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@ -152,19 +138,21 @@ __asm__(".align 5\n"
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".align 2\n\t"
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"1:.long do_exit");
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/* Don't use this in BL=1(cli). Or else, CPU resets! */
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int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
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{ /* Don't use this in BL=1(cli). Or else, CPU resets! */
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{
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struct pt_regs regs;
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memset(®s, 0, sizeof(regs));
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regs.regs[4] = (unsigned long) arg;
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regs.regs[5] = (unsigned long) fn;
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regs.regs[4] = (unsigned long)arg;
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regs.regs[5] = (unsigned long)fn;
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regs.pc = (unsigned long) kernel_thread_helper;
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regs.pc = (unsigned long)kernel_thread_helper;
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regs.sr = (1 << 30);
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/* Ok, create the new process.. */
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return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, ®s, 0, NULL, NULL);
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return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0,
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®s, 0, NULL, NULL);
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}
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/*
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@ -211,21 +199,20 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
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return fpvalid;
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}
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/*
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/*
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* Capture the user space registers if the task is not running (in user space)
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*/
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int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
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{
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struct pt_regs ptregs;
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ptregs = *task_pt_regs(tsk);
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elf_core_copy_regs(regs, &ptregs);
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return 1;
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}
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int
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dump_task_fpu (struct task_struct *tsk, elf_fpregset_t *fpu)
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int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpu)
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{
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int fpvalid = 0;
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@ -263,12 +250,14 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
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childregs->regs[15] = usp;
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ti->addr_limit = USER_DS;
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} else {
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childregs->regs[15] = (unsigned long)task_stack_page(p) + THREAD_SIZE;
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childregs->regs[15] = (unsigned long)task_stack_page(p) +
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THREAD_SIZE;
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ti->addr_limit = KERNEL_DS;
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}
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if (clone_flags & CLONE_SETTLS) {
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if (clone_flags & CLONE_SETTLS)
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childregs->gbr = childregs->regs[0];
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}
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childregs->regs[0] = 0; /* Set return value for child */
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p->thread.sp = (unsigned long) childregs;
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}
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/* Tracing by user break controller. */
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static void
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ubc_set_tracing(int asid, unsigned long pc)
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static void ubc_set_tracing(int asid, unsigned long pc)
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{
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#if defined(CONFIG_CPU_SH4A)
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unsigned long val;
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val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE);
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ctrl_outl(val, UBC_CRR0);
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/* Read UBC register that we writed last. For chekking UBC Register changed */
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/* Read UBC register that we wrote last, for checking update */
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val = ctrl_inl(UBC_CRR0);
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#else /* CONFIG_CPU_SH4A */
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* switch_to(x,y) should switch tasks from x to y.
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*
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*/
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struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *next)
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struct task_struct *__switch_to(struct task_struct *prev,
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struct task_struct *next)
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{
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#if defined(CONFIG_SH_FPU)
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unlazy_fpu(prev, task_pt_regs(prev));
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#ifdef CONFIG_MMU
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/*
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* Restore the kernel mode register
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* k7 (r7_bank1)
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* k7 (r7_bank1)
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*/
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asm volatile("ldc %0, r7_bank"
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: /* no output */
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else if (next->thread.ubc_pc && next->mm) {
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int asid = 0;
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#ifdef CONFIG_MMU
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asid |= next->mm->context.id & MMU_CONTEXT_ASID_MASK;
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asid |= cpu_asid(smp_processor_id(), next->mm);
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#endif
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ubc_set_tracing(asid, next->thread.ubc_pc);
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} else {
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if (!newsp)
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newsp = regs->regs[15];
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return do_fork(clone_flags, newsp, regs, 0,
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(int __user *)parent_tidptr, (int __user *)child_tidptr);
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(int __user *)parent_tidptr,
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(int __user *)child_tidptr);
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}
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/*
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DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
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pgd_t swapper_pg_dir[PTRS_PER_PGD];
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/*
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* Cache of MMU context last used.
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*/
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unsigned long mmu_context_cache = NO_CONTEXT;
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#ifdef CONFIG_MMU
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/* It'd be good if these lines were in the standard header file. */
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#define START_PFN (NODE_DATA(0)->bdata->node_boot_start >> PAGE_SHIFT)
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
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{
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if (vma->vm_mm && vma->vm_mm->context.id != NO_CONTEXT) {
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unsigned int cpu = smp_processor_id();
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if (vma->vm_mm && cpu_context(cpu, vma->vm_mm) != NO_CONTEXT) {
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unsigned long flags;
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unsigned long asid;
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unsigned long saved_asid = MMU_NO_ASID;
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asid = vma->vm_mm->context.id & MMU_CONTEXT_ASID_MASK;
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asid = cpu_asid(cpu, vma->vm_mm);
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page &= PAGE_MASK;
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local_irq_save(flags);
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unsigned long end)
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{
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struct mm_struct *mm = vma->vm_mm;
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unsigned int cpu = smp_processor_id();
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if (mm->context.id != NO_CONTEXT) {
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if (cpu_context(cpu, mm) != NO_CONTEXT) {
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unsigned long flags;
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int size;
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local_irq_save(flags);
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size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
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if (size > (MMU_NTLB_ENTRIES/4)) { /* Too many TLB to flush */
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mm->context.id = NO_CONTEXT;
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cpu_context(cpu, mm) = NO_CONTEXT;
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if (mm == current->mm)
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activate_context(mm);
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activate_context(mm, cpu);
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} else {
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unsigned long asid;
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unsigned long saved_asid = MMU_NO_ASID;
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asid = mm->context.id & MMU_CONTEXT_ASID_MASK;
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asid = cpu_asid(cpu, mm);
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start &= PAGE_MASK;
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end += (PAGE_SIZE - 1);
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end &= PAGE_MASK;
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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unsigned int cpu = smp_processor_id();
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unsigned long flags;
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int size;
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unsigned long asid;
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unsigned long saved_asid = get_asid();
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asid = init_mm.context.id & MMU_CONTEXT_ASID_MASK;
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asid = cpu_asid(cpu, &init_mm);
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start &= PAGE_MASK;
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end += (PAGE_SIZE - 1);
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end &= PAGE_MASK;
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void flush_tlb_mm(struct mm_struct *mm)
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{
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unsigned int cpu = smp_processor_id();
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/* Invalidate all TLB of this process. */
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/* Instead of invalidating each TLB, we get new MMU context. */
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if (mm->context.id != NO_CONTEXT) {
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if (cpu_context(cpu, mm) != NO_CONTEXT) {
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unsigned long flags;
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local_irq_save(flags);
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mm->context.id = NO_CONTEXT;
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cpu_context(cpu, mm) = NO_CONTEXT;
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if (mm == current->mm)
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activate_context(mm);
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activate_context(mm, cpu);
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local_irq_restore(flags);
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}
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}
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@ -1,25 +1,19 @@
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#ifndef __MMU_H
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#define __MMU_H
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#if !defined(CONFIG_MMU)
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/* Default "unsigned long" context */
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typedef unsigned long mm_context_id_t[NR_CPUS];
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typedef struct {
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#ifdef CONFIG_MMU
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mm_context_id_t id;
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void *vdso;
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#else
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struct vm_list_struct *vmlist;
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unsigned long end_brk;
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#endif
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} mm_context_t;
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#else
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/* Default "unsigned long" context */
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typedef unsigned long mm_context_id_t;
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typedef struct {
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mm_context_id_t id;
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void *vdso;
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} mm_context_t;
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#endif /* CONFIG_MMU */
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/*
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* Privileged Space Mapping Buffer (PMB) definitions
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*/
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@ -1,6 +1,6 @@
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/*
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* Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2003 Paul Mundt
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* Copyright (C) 2003 - 2006 Paul Mundt
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*
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* ASID handling idea taken from MIPS implementation.
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*/
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* (b) ASID (Address Space IDentifier)
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*/
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/*
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* Cache of MMU context last used.
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*/
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extern unsigned long mmu_context_cache;
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#define MMU_CONTEXT_ASID_MASK 0x000000ff
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#define MMU_CONTEXT_VERSION_MASK 0xffffff00
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#define MMU_CONTEXT_FIRST_VERSION 0x00000100
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/* ASID is 8-bit value, so it can't be 0x100 */
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#define MMU_NO_ASID 0x100
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#define cpu_context(cpu, mm) ((mm)->context.id[cpu])
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#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & \
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MMU_CONTEXT_ASID_MASK)
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#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
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/*
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* Virtual Page Number mask
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*/
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/*
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* Get MMU context if needed.
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*/
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static inline void get_mmu_context(struct mm_struct *mm)
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static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
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{
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unsigned long mc = mmu_context_cache;
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unsigned long asid = asid_cache(cpu);
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/* Check if we have old version of context. */
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if (((mm->context.id ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0)
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if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0)
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/* It's up to date, do nothing */
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return;
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/* It's old, we need to get new context with new version. */
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mc = ++mmu_context_cache;
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if (!(mc & MMU_CONTEXT_ASID_MASK)) {
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if (!(++asid & MMU_CONTEXT_ASID_MASK)) {
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/*
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* We exhaust ASID of this version.
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* Flush all TLB and start new cycle.
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@ -63,10 +62,11 @@ static inline void get_mmu_context(struct mm_struct *mm)
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* Fix version; Note that we avoid version #0
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* to distingush NO_CONTEXT.
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*/
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if (!mc)
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mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
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if (!asid)
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asid = MMU_CONTEXT_FIRST_VERSION;
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}
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mm->context.id = mc;
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cpu_context(cpu, mm) = asid_cache(cpu) = asid;
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}
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/*
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@ -74,9 +74,13 @@ static inline void get_mmu_context(struct mm_struct *mm)
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* instance.
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*/
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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struct mm_struct *mm)
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{
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mm->context.id = NO_CONTEXT;
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int i;
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for (i = 0; i < num_online_cpus(); i++)
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cpu_context(i, mm) = NO_CONTEXT;
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return 0;
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}
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@ -117,10 +121,10 @@ static inline unsigned long get_asid(void)
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* After we have set current->mm to a new value, this activates
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* the context for the new mm so we see the new mappings.
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*/
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static inline void activate_context(struct mm_struct *mm)
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static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
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{
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get_mmu_context(mm);
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set_asid(mm->context.id & MMU_CONTEXT_ASID_MASK);
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get_mmu_context(mm, cpu);
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set_asid(cpu_asid(cpu, mm));
|
||||
}
|
||||
|
||||
/* MMU_TTB is used for optimizing the fault handling. */
|
||||
|
@ -138,10 +142,15 @@ static inline void switch_mm(struct mm_struct *prev,
|
|||
struct mm_struct *next,
|
||||
struct task_struct *tsk)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
|
||||
if (likely(prev != next)) {
|
||||
cpu_set(cpu, next->cpu_vm_mask);
|
||||
set_TTB(next->pgd);
|
||||
activate_context(next);
|
||||
}
|
||||
activate_context(next, cpu);
|
||||
} else
|
||||
if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
|
||||
activate_context(next, cpu);
|
||||
}
|
||||
|
||||
#define deactivate_mm(tsk,mm) do { } while (0)
|
||||
|
@ -159,7 +168,7 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
|
|||
#define destroy_context(mm) do { } while (0)
|
||||
#define set_asid(asid) do { } while (0)
|
||||
#define get_asid() (0)
|
||||
#define activate_context(mm) do { } while (0)
|
||||
#define activate_context(mm,cpu) do { } while (0)
|
||||
#define switch_mm(prev,next,tsk) do { } while (0)
|
||||
#define deactivate_mm(tsk,mm) do { } while (0)
|
||||
#define activate_mm(prev,next) do { } while (0)
|
||||
|
@ -174,14 +183,16 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
|
|||
*/
|
||||
static inline void enable_mmu(void)
|
||||
{
|
||||
unsigned int cpu = smp_processor_id();
|
||||
|
||||
/* Enable MMU */
|
||||
ctrl_outl(MMU_CONTROL_INIT, MMUCR);
|
||||
ctrl_barrier();
|
||||
|
||||
if (mmu_context_cache == NO_CONTEXT)
|
||||
mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
|
||||
if (asid_cache(cpu) == NO_CONTEXT)
|
||||
asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION;
|
||||
|
||||
set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
|
||||
set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK);
|
||||
}
|
||||
|
||||
static inline void disable_mmu(void)
|
||||
|
|
|
@ -66,6 +66,7 @@ enum cpu_type {
|
|||
struct sh_cpuinfo {
|
||||
unsigned int type;
|
||||
unsigned long loops_per_jiffy;
|
||||
unsigned long asid_cache;
|
||||
|
||||
struct cache_info icache; /* Primary I-cache */
|
||||
struct cache_info dcache; /* Primary D-cache */
|
||||
|
|
Loading…
Reference in New Issue
Block a user