forked from luck/tmp_suning_uos_patched
mmc: block: Update ext_csd.cache_ctrl if it was written
commit aea0440ad023ab0662299326f941214b0d7480bd upstream. The cache function can be turned ON and OFF by writing to the CACHE_CTRL byte (EXT_CSD byte [33]). However, card->ext_csd.cache_ctrl is only set on init if cache size > 0. Fix that by explicitly setting ext_csd.cache_ctrl on ext-csd write. Signed-off-by: Avri Altman <avri.altman@wdc.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210420134641.57343-3-avri.altman@wdc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -571,6 +571,18 @@ static int __mmc_blk_ioctl_cmd(struct mmc_card *card, struct mmc_blk_data *md,
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main_md->part_curr = value & EXT_CSD_PART_CONFIG_ACC_MASK;
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}
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/*
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* Make sure to update CACHE_CTRL in case it was changed. The cache
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* will get turned back on if the card is re-initialized, e.g.
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* suspend/resume or hw reset in recovery.
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*/
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if ((MMC_EXTRACT_INDEX_FROM_ARG(cmd.arg) == EXT_CSD_CACHE_CTRL) &&
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(cmd.opcode == MMC_SWITCH)) {
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u8 value = MMC_EXTRACT_VALUE_FROM_ARG(cmd.arg) & 1;
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card->ext_csd.cache_ctrl = value;
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}
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/*
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* According to the SD specs, some commands require a delay after
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* issuing the command.
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