forked from luck/tmp_suning_uos_patched
m68k: mac: Avoid stuck ISM IOP interrupt on Quadra 900/950
On a Quadra 900/950, the ISM IOP IRQ output pin is connected to an edge-triggered input on VIA2. It is theoretically possible that this signal could fail to produce the expected VIA2 interrupt. The two IOP interrupt flags can be asserted in any order but the logic in iop_ism_irq() does not allow for that. In particular, INT0 can be asserted right after INT0 is checked and before INT1 is cleared. Such an interrupt would produce no new edge and VIA2 would detect no further interrupts from the IOP. Avoid this by looping over the INT0/1 handlers so an edge can be produced. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Tested-by: Stan Johnson <userm57@yahoo.com> Cc: Joshua Thompson <funaho@jurai.org> Link: https://lore.kernel.org/r/bfbb71db52c5e162d3afa25a28fc5d535ca87138.1589949122.git.fthain@telegraphics.com.au Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
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@ -565,36 +565,42 @@ irqreturn_t iop_ism_irq(int irq, void *dev_id)
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uint iop_num = (uint) dev_id;
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volatile struct mac_iop *iop = iop_base[iop_num];
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int i,state;
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u8 events = iop->status_ctrl & (IOP_INT0 | IOP_INT1);
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iop_pr_debug("status %02X\n", iop->status_ctrl);
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/* INT0 indicates a state change on an outgoing message channel */
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if (iop->status_ctrl & IOP_INT0) {
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iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC;
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iop_pr_debug("new status %02X, send states", iop->status_ctrl);
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for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
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state = iop_readb(iop, IOP_ADDR_SEND_STATE + i);
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iop_pr_cont(" %02X", state);
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if (state == IOP_MSG_COMPLETE) {
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iop_handle_send(iop_num, i);
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do {
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/* INT0 indicates state change on an outgoing message channel */
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if (events & IOP_INT0) {
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iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC;
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iop_pr_debug("new status %02X, send states",
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iop->status_ctrl);
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for (i = 0; i < NUM_IOP_CHAN; i++) {
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state = iop_readb(iop, IOP_ADDR_SEND_STATE + i);
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iop_pr_cont(" %02X", state);
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if (state == IOP_MSG_COMPLETE)
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iop_handle_send(iop_num, i);
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}
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iop_pr_cont("\n");
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}
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iop_pr_cont("\n");
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}
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if (iop->status_ctrl & IOP_INT1) { /* INT1 for incoming msgs */
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iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC;
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iop_pr_debug("new status %02X, recv states", iop->status_ctrl);
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for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
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state = iop_readb(iop, IOP_ADDR_RECV_STATE + i);
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iop_pr_cont(" %02X", state);
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if (state == IOP_MSG_NEW) {
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iop_handle_recv(iop_num, i);
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/* INT1 for incoming messages */
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if (events & IOP_INT1) {
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iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC;
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iop_pr_debug("new status %02X, recv states",
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iop->status_ctrl);
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for (i = 0; i < NUM_IOP_CHAN; i++) {
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state = iop_readb(iop, IOP_ADDR_RECV_STATE + i);
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iop_pr_cont(" %02X", state);
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if (state == IOP_MSG_NEW)
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iop_handle_recv(iop_num, i);
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}
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iop_pr_cont("\n");
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}
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iop_pr_cont("\n");
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}
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events = iop->status_ctrl & (IOP_INT0 | IOP_INT1);
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} while (events);
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return IRQ_HANDLED;
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}
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