forked from luck/tmp_suning_uos_patched
[ARM] OMAP3 clock: remove unnecessary dpll_data dereferences
Remove some clutter from omap2_dpll_round_rate(). linux-omap source commit is 4625dceb8583c02a6d67ededc9f6a8347b6b8cb7. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -877,19 +877,22 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
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int m, n, r, e, scaled_max_m;
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unsigned long scaled_rt_rp, new_rate;
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int min_e = -1, min_e_m = -1, min_e_n = -1;
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struct dpll_data *dd;
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if (!clk || !clk->dpll_data)
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return ~0;
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dd = clk->dpll_data;
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pr_debug("clock: starting DPLL round_rate for clock %s, target rate "
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"%ld\n", clk->name, target_rate);
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scaled_rt_rp = target_rate / (clk->parent->rate / DPLL_SCALE_FACTOR);
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scaled_max_m = clk->dpll_data->max_multiplier * DPLL_SCALE_FACTOR;
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scaled_max_m = dd->max_multiplier * DPLL_SCALE_FACTOR;
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clk->dpll_data->last_rounded_rate = 0;
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dd->last_rounded_rate = 0;
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for (n = clk->dpll_data->max_divider; n >= DPLL_MIN_DIVIDER; n--) {
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for (n = dd->max_divider; n >= DPLL_MIN_DIVIDER; n--) {
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/* Compute the scaled DPLL multiplier, based on the divider */
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m = scaled_rt_rp * n;
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@ -909,7 +912,7 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
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"(new_rate = %ld)\n", n, m, e, new_rate);
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if (min_e == -1 ||
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min_e >= (int)(abs(e) - clk->dpll_data->rate_tolerance)) {
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min_e >= (int)(abs(e) - dd->rate_tolerance)) {
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min_e = e;
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min_e_m = m;
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min_e_n = n;
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@ -932,17 +935,17 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate)
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return ~0;
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}
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clk->dpll_data->last_rounded_m = min_e_m;
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clk->dpll_data->last_rounded_n = min_e_n;
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clk->dpll_data->last_rounded_rate =
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_dpll_compute_new_rate(clk->parent->rate, min_e_m, min_e_n);
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dd->last_rounded_m = min_e_m;
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dd->last_rounded_n = min_e_n;
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dd->last_rounded_rate = _dpll_compute_new_rate(clk->parent->rate,
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min_e_m, min_e_n);
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pr_debug("clock: final least error: e = %d, m = %d, n = %d\n",
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min_e, min_e_m, min_e_n);
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pr_debug("clock: final rate: %ld (target rate: %ld)\n",
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clk->dpll_data->last_rounded_rate, target_rate);
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dd->last_rounded_rate, target_rate);
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return clk->dpll_data->last_rounded_rate;
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return dd->last_rounded_rate;
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}
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/*-------------------------------------------------------------------------
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