forked from luck/tmp_suning_uos_patched
powerpc/44x: Add additional device support for APM821xx SoC and Bluestone board
This patch updates the dts file for bluestone board with support: - UART1 - L2 cache - NAND with NDFC - PCI-E Signed-off-by: Vinh Nguyen Huu Tuong <vhtnguyen@apm.com> Signed-off-by: Josh Boyer <jwboyer@gmail.com>
This commit is contained in:
Vinh Nguyen Huu Tuong
Josh Boyer
parent
b6bb23b923
commit
b5594a7760
@ -33,7 +33,7 @@ / {
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aliases {
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ethernet0 = &EMAC0;
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serial0 = &UART0;
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//serial1 = &UART1; --gcl missing UART1 label
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serial1 = &UART1;
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};
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cpus {
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@ -52,7 +52,7 @@ cpu@0 {
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d-cache-size = <32768>;
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dcr-controller;
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dcr-access-method = "native";
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//next-level-cache = <&L2C0>; --gcl missing L2C0 label
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next-level-cache = <&L2C0>;
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};
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};
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@ -117,6 +117,16 @@ CPR0: cpr {
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dcr-reg = <0x00c 0x002>;
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};
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L2C0: l2c {
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compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
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dcr-reg = <0x020 0x008
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0x030 0x008>;
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cache-line-size = <32>;
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cache-size = <262144>;
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interrupt-parent = <&UIC1>;
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interrupts = <11 1>;
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};
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plb {
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compatible = "ibm,plb4";
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#address-cells = <2>;
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@ -182,6 +192,53 @@ partition@1a0000 {
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reg = <0x001a0000 0x00060000>;
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};
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};
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ndfc@1,0 {
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compatible = "ibm,ndfc";
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reg = <0x00000003 0x00000000 0x00002000>;
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ccr = <0x00001000>;
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bank-settings = <0x80002222>;
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#address-cells = <1>;
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#size-cells = <1>;
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/* 2Gb Nand Flash */
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nand {
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "firmware";
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reg = <0x00000000 0x00C00000>;
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};
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partition@c00000 {
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label = "environment";
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reg = <0x00C00000 0x00B00000>;
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};
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partition@1700000 {
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label = "kernel";
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reg = <0x01700000 0x00E00000>;
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};
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partition@2500000 {
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label = "root";
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reg = <0x02500000 0x08200000>;
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};
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partition@a700000 {
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label = "device-tree";
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reg = <0x0A700000 0x00B00000>;
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};
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partition@b200000 {
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label = "config";
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reg = <0x0B200000 0x00D00000>;
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};
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partition@bf00000 {
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label = "diag";
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reg = <0x0BF00000 0x00C00000>;
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};
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partition@cb00000 {
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label = "vendor";
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reg = <0x0CB00000 0x3500000>;
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};
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};
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};
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};
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UART0: serial@ef600300 {
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@ -195,11 +252,36 @@ UART0: serial@ef600300 {
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interrupts = <0x1 0x4>;
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600400 0x00000008>;
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virtual-reg = <0xef600400>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <&UIC0>;
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interrupts = <0x1 0x4>;
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};
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IIC0: i2c@ef600700 {
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compatible = "ibm,iic";
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reg = <0xef600700 0x00000014>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x2 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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rtc@68 {
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compatible = "stm,m41t80";
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reg = <0x68>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x9 0x8>;
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};
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sttm@4C {
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compatible = "adm,adm1032";
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reg = <0x4C>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x1E 0x8>; /* CPU_THERNAL_L */
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};
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};
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IIC1: i2c@ef600800 {
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@ -250,5 +332,46 @@ EMAC0: ethernet@ef600c00 {
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};
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};
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PCIE0: pciex@d00000000 {
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
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primary;
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port = <0x0>; /* port number */
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reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
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0x0000000c 0x08010000 0x00001000>; /* Registers */
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dcr-reg = <0x100 0x020>;
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sdr-base = <0x300>;
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/* Outbound ranges, one memory and one IO,
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* later cannot be changed
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*/
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ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
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0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
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0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
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/* Inbound 2GB range starting at 0 */
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dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
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/* This drives busses 40 to 0x7f */
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bus-range = <0x40 0x7f>;
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/* Legacy interrupts (note the weird polarity, the bridge seems
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* to invert PCIe legacy interrupts).
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* We are de-swizzling here because the numbers are actually for
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* port of the root complex virtual P2P bridge. But I want
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* to avoid putting a node for it in the tree, so the numbers
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* below are basically de-swizzled numbers.
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* The real slot is on idsel 0, so the swizzling is 1:1
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*/
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interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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interrupt-map = <
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0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
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0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
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0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
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0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
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};
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};
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};
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