forked from luck/tmp_suning_uos_patched
[PATCH] powerpc: Separate usage of KERNELBASE and PAGE_OFFSET
This patch separates usage of KERNELBASE and PAGE_OFFSET. I haven't looked at any of the PPC32 code, if we ever want to support Kdump on PPC we'll have to do another audit, ditto for iSeries. This patch makes PAGE_OFFSET the constant, it'll always be 0xC * 1 gazillion for 64-bit. To get a physical address from a virtual one you subtract PAGE_OFFSET, _not_ KERNELBASE. KERNELBASE is the virtual address of the start of the kernel, it's often the same as PAGE_OFFSET, but _might not be_. If you want to know something's offset from the start of the kernel you should subtract KERNELBASE. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -60,7 +60,7 @@ int force_printk_to_btext = 0;
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*
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* The display is mapped to virtual address 0xD0000000, rather
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* than 1:1, because some some CHRP machines put the frame buffer
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* in the region starting at 0xC0000000 (KERNELBASE).
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* in the region starting at 0xC0000000 (PAGE_OFFSET).
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* This mapping is temporary and will disappear as soon as the
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* setup done by MMU_Init() is applied.
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*
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@ -71,7 +71,7 @@ int force_printk_to_btext = 0;
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*/
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void __init btext_prepare_BAT(void)
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{
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unsigned long vaddr = KERNELBASE + 0x10000000;
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unsigned long vaddr = PAGE_OFFSET + 0x10000000;
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unsigned long addr;
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unsigned long lowbits;
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@ -690,7 +690,7 @@ _GLOBAL(enter_rtas)
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/* Setup our real return addr */
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SET_REG_TO_LABEL(r4,.rtas_return_loc)
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SET_REG_TO_CONST(r9,KERNELBASE)
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SET_REG_TO_CONST(r9,PAGE_OFFSET)
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sub r4,r4,r9
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mtlr r4
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@ -718,7 +718,7 @@ _GLOBAL(enter_rtas)
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_STATIC(rtas_return_loc)
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/* relocation is off at this point */
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mfspr r4,SPRN_SPRG3 /* Get PACA */
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SET_REG_TO_CONST(r5, KERNELBASE)
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SET_REG_TO_CONST(r5, PAGE_OFFSET)
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sub r4,r4,r5 /* RELOC the PACA base pointer */
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mfmsr r6
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@ -16,8 +16,8 @@ const struct LparMap __attribute__((__section__(".text"))) xLparMap = {
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.xSegmentTableOffs = STAB0_PAGE,
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.xEsids = {
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{ .xKernelEsid = GET_ESID(KERNELBASE),
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.xKernelVsid = KERNEL_VSID(KERNELBASE), },
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{ .xKernelEsid = GET_ESID(PAGE_OFFSET),
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.xKernelVsid = KERNEL_VSID(PAGE_OFFSET), },
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{ .xKernelEsid = GET_ESID(VMALLOCBASE),
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.xKernelVsid = KERNEL_VSID(VMALLOCBASE), },
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},
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@ -25,7 +25,7 @@ const struct LparMap __attribute__((__section__(".text"))) xLparMap = {
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.xRanges = {
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{ .xPages = HvPagesToMap,
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.xOffset = 0,
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.xVPN = KERNEL_VSID(KERNELBASE) << (SID_SHIFT - HW_PAGE_SHIFT),
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.xVPN = KERNEL_VSID(PAGE_OFFSET) << (SID_SHIFT - HW_PAGE_SHIFT),
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},
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},
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};
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@ -153,9 +153,8 @@ void kexec_copy_flush(struct kimage *image)
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* including ones that were in place on the original copy
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*/
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for (i = 0; i < nr_segments; i++)
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flush_icache_range(ranges[i].mem + KERNELBASE,
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ranges[i].mem + KERNELBASE +
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ranges[i].memsz);
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flush_icache_range((unsigned long)__va(ranges[i].mem),
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(unsigned long)__va(ranges[i].mem + ranges[i].memsz));
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}
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#ifdef CONFIG_SMP
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@ -456,7 +456,7 @@ void __init htab_initialize(void)
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/* create bolted the linear mapping in the hash table */
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for (i=0; i < lmb.memory.cnt; i++) {
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base = lmb.memory.region[i].base + KERNELBASE;
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base = (unsigned long)__va(lmb.memory.region[i].base);
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size = lmb.memory.region[i].size;
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DBG("creating mapping for region: %lx : %lx\n", base, size);
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@ -498,8 +498,8 @@ void __init htab_initialize(void)
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* for either 4K or 16MB pages.
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*/
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if (tce_alloc_start) {
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tce_alloc_start += KERNELBASE;
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tce_alloc_end += KERNELBASE;
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tce_alloc_start = (unsigned long)__va(tce_alloc_start);
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tce_alloc_end = (unsigned long)__va(tce_alloc_end);
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if (base + size >= tce_alloc_start)
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tce_alloc_start = base + size + 1;
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@ -75,7 +75,7 @@ static void slb_flush_and_rebolt(void)
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vflags = SLB_VSID_KERNEL | virtual_llp;
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ksp_esid_data = mk_esid_data(get_paca()->kstack, 2);
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if ((ksp_esid_data & ESID_MASK) == KERNELBASE)
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if ((ksp_esid_data & ESID_MASK) == PAGE_OFFSET)
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ksp_esid_data &= ~SLB_ESID_V;
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/* We need to do this all in asm, so we're sure we don't touch
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@ -213,7 +213,7 @@ void slb_initialize(void)
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asm volatile("isync":::"memory");
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asm volatile("slbmte %0,%0"::"r" (0) : "memory");
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asm volatile("isync; slbia; isync":::"memory");
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create_slbe(KERNELBASE, lflags, 0);
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create_slbe(PAGE_OFFSET, lflags, 0);
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/* VMALLOC space has 4K pages always for now */
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create_slbe(VMALLOCBASE, vflags, 1);
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@ -37,9 +37,9 @@ _GLOBAL(slb_allocate_realmode)
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srdi r9,r3,60 /* get region */
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srdi r10,r3,28 /* get esid */
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cmpldi cr7,r9,0xc /* cmp KERNELBASE for later use */
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cmpldi cr7,r9,0xc /* cmp PAGE_OFFSET for later use */
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/* r3 = address, r10 = esid, cr7 = <>KERNELBASE */
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/* r3 = address, r10 = esid, cr7 = <> PAGE_OFFSET */
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blt cr7,0f /* user or kernel? */
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/* kernel address: proto-VSID = ESID */
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@ -166,7 +166,7 @@ _GLOBAL(slb_allocate_user)
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/*
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* Finish loading of an SLB entry and return
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*
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* r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <>KERNELBASE
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* r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
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*/
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slb_finish_load:
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ASM_VSID_SCRAMBLE(r10,r9)
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@ -40,7 +40,7 @@ static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
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unsigned long entry, group, old_esid, castout_entry, i;
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unsigned int global_entry;
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struct stab_entry *ste, *castout_ste;
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unsigned long kernel_segment = (esid << SID_SHIFT) >= KERNELBASE;
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unsigned long kernel_segment = (esid << SID_SHIFT) >= PAGE_OFFSET;
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vsid_data = vsid << STE_VSID_SHIFT;
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esid_data = esid << SID_SHIFT | STE_ESID_KP | STE_ESID_V;
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@ -83,7 +83,7 @@ static int make_ste(unsigned long stab, unsigned long esid, unsigned long vsid)
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}
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/* Dont cast out the first kernel segment */
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if ((castout_ste->esid_data & ESID_MASK) != KERNELBASE)
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if ((castout_ste->esid_data & ESID_MASK) != PAGE_OFFSET)
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break;
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castout_entry = (castout_entry + 1) & 0xf;
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@ -251,7 +251,7 @@ void stabs_alloc(void)
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panic("Unable to allocate segment table for CPU %d.\n",
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cpu);
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newstab += KERNELBASE;
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newstab = (unsigned long)__va(newstab);
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memset((void *)newstab, 0, HW_PAGE_SIZE);
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@ -270,11 +270,11 @@ void stabs_alloc(void)
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*/
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void stab_initialize(unsigned long stab)
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{
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unsigned long vsid = get_kernel_vsid(KERNELBASE);
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unsigned long vsid = get_kernel_vsid(PAGE_OFFSET);
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unsigned long stabreal;
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asm volatile("isync; slbia; isync":::"memory");
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make_ste(stab, GET_ESID(KERNELBASE), vsid);
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make_ste(stab, GET_ESID(PAGE_OFFSET), vsid);
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/* Order update */
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asm volatile("sync":::"memory");
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@ -37,6 +37,20 @@
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*/
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#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
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/*
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* KERNELBASE is the virtual address of the start of the kernel, it's often
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* the same as PAGE_OFFSET, but _might not be_.
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*
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* The kdump dump kernel is one example where KERNELBASE != PAGE_OFFSET.
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*
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* To get a physical address from a virtual one you subtract PAGE_OFFSET,
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* _not_ KERNELBASE.
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*
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* If you want to know something's offset from the start of the kernel you
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* should subtract KERNELBASE.
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*
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* If you want to test if something's a kernel address, use is_kernel_addr().
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*/
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#define PAGE_OFFSET ASM_CONST(CONFIG_KERNEL_START)
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#define KERNELBASE PAGE_OFFSET
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@ -56,7 +70,7 @@
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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#define __va(x) ((void *)((unsigned long)(x) + KERNELBASE))
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#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
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#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
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/*
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