forked from luck/tmp_suning_uos_patched
cciss: correct the non-resettable board list
The hpsa driver carries a more recent version, copy the table from there. Signed-off-by: Tomas Henzl <thenzl@redhat.com> Acked-by: Don Brace <Don.Brace@pmcs.com> Signed-off-by: James Bottomley <JBottomley@Odin.com>
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@ -582,12 +582,32 @@ static u32 unresettable_controller[] = {
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0x3215103C, /* Smart Array E200i */
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0x3237103C, /* Smart Array E500 */
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0x323D103C, /* Smart Array P700m */
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0x40800E11, /* Smart Array 5i */
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0x409C0E11, /* Smart Array 6400 */
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0x409D0E11, /* Smart Array 6400 EM */
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0x40700E11, /* Smart Array 5300 */
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0x40820E11, /* Smart Array 532 */
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0x40830E11, /* Smart Array 5312 */
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0x409A0E11, /* Smart Array 641 */
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0x409B0E11, /* Smart Array 642 */
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0x40910E11, /* Smart Array 6i */
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};
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/* List of controllers which cannot even be soft reset */
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static u32 soft_unresettable_controller[] = {
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0x40800E11, /* Smart Array 5i */
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0x40700E11, /* Smart Array 5300 */
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0x40820E11, /* Smart Array 532 */
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0x40830E11, /* Smart Array 5312 */
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0x409A0E11, /* Smart Array 641 */
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0x409B0E11, /* Smart Array 642 */
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0x40910E11, /* Smart Array 6i */
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/* Exclude 640x boards. These are two pci devices in one slot
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* which share a battery backed cache module. One controls the
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* cache, the other accesses the cache through the one that controls
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* it. If we reset the one controlling the cache, the other will
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* likely not be happy. Just forbid resetting this conjoined mess.
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*/
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0x409C0E11, /* Smart Array 6400 */
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0x409D0E11, /* Smart Array 6400 EM */
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};
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@ -4663,8 +4683,7 @@ static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
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*/
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cciss_lookup_board_id(pdev, &board_id);
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if (!ctlr_is_resettable(board_id)) {
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dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
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"due to shared cache module.");
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dev_warn(&pdev->dev, "Controller not resettable\n");
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return -ENODEV;
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}
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