forked from luck/tmp_suning_uos_patched
i7core_edac: maps all sockets as if ther are one MC controller
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
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67166af4ab
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ba6c5c62ee
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@ -409,12 +409,12 @@ static int i7core_get_active_channels(u8 socket, unsigned *channels,
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return 0;
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}
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static int get_dimm_config(struct mem_ctl_info *mci, u8 socket)
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static int get_dimm_config(struct mem_ctl_info *mci, int *csrow, u8 socket)
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{
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struct i7core_pvt *pvt = mci->pvt_info;
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struct csrow_info *csr;
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struct pci_dev *pdev;
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int i, j, csrow = 0;
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int i, j;
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unsigned long last_page = 0;
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enum edac_type mode;
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enum mem_type mtype;
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@ -534,7 +534,7 @@ static int get_dimm_config(struct mem_ctl_info *mci, u8 socket)
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npages = size << (20 - PAGE_SHIFT);
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#endif
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csr = &mci->csrows[csrow];
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csr = &mci->csrows[*csrow];
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csr->first_page = last_page + 1;
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last_page += npages;
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csr->last_page = last_page;
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@ -542,7 +542,7 @@ static int get_dimm_config(struct mem_ctl_info *mci, u8 socket)
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csr->page_mask = 0;
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csr->grain = 8;
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csr->csrow_idx = csrow;
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csr->csrow_idx = *csrow;
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csr->nr_channels = 1;
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csr->channels[0].chan_idx = i;
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@ -565,7 +565,7 @@ static int get_dimm_config(struct mem_ctl_info *mci, u8 socket)
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csr->edac_mode = mode;
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csr->mtype = mtype;
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csrow++;
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(*csrow)++;
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}
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pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]);
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@ -1424,6 +1424,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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struct i7core_pvt *pvt;
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int num_channels = 0;
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int num_csrows = 0;
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int csrow = 0;
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int dev_idx = id->driver_data;
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int rc, i;
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u8 sockets;
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@ -1495,7 +1496,7 @@ static int __devinit i7core_probe(struct pci_dev *pdev,
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/* Get dimm basic config */
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for (i = 0; i < sockets; i++)
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get_dimm_config(mci, i);
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get_dimm_config(mci, &csrow, i);
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/* add this new MC control structure to EDAC's list of MCs */
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if (unlikely(edac_mc_add_mc(mci))) {
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