forked from luck/tmp_suning_uos_patched
drm/i915: PSR: organize setup function.
psr_enabled is already by itself a setup once so let's put the W/As there and rename old setup once to setup_vsc. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1991,10 +1991,8 @@ static void intel_edp_psr_write_vsc(struct intel_dp *intel_dp,
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POSTING_READ(ctl_reg);
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}
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static void intel_edp_psr_setup(struct intel_dp *intel_dp)
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static void intel_edp_psr_setup_vsc(struct intel_dp *intel_dp)
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{
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struct drm_device *dev = intel_dp_to_dev(intel_dp);
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct edp_vsc_psr psr_vsc;
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/* Prepare VSC packet as per EDP 1.3 spec, Table 3.10 */
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@ -2004,10 +2002,6 @@ static void intel_edp_psr_setup(struct intel_dp *intel_dp)
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psr_vsc.sdp_header.HB2 = 0x2;
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psr_vsc.sdp_header.HB3 = 0x8;
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intel_edp_psr_write_vsc(intel_dp, &psr_vsc);
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/* Avoid continuous PSR exit by masking memup and hpd */
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I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
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EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
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}
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static void intel_edp_psr_enable_sink(struct intel_dp *intel_dp)
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@ -2160,8 +2154,11 @@ void intel_edp_psr_enable(struct intel_dp *intel_dp)
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dev_priv->psr.busy_frontbuffer_bits = 0;
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/* Setup PSR once */
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intel_edp_psr_setup(intel_dp);
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intel_edp_psr_setup_vsc(intel_dp);
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/* Avoid continuous PSR exit by masking memup and hpd */
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I915_WRITE(EDP_PSR_DEBUG_CTL(dev), EDP_PSR_DEBUG_MASK_MEMUP |
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EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
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if (intel_edp_psr_match_conditions(intel_dp))
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dev_priv->psr.enabled = intel_dp;
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