forked from luck/tmp_suning_uos_patched
pinctrl: at91-pio4: handle suspend to ram
When suspending to RAM, the power to the core is cut and the register values are lost. Save and restore more registers than just IMR. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -126,7 +126,11 @@ struct atmel_pioctrl {
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struct irq_domain *irq_domain;
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int *irqs;
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unsigned *pm_wakeup_sources;
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unsigned *pm_suspend_backup;
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struct {
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u32 imr;
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u32 odsr;
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u32 cfgr[ATMEL_PIO_NPINS_PER_BANK];
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} *pm_suspend_backup;
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struct device *dev;
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struct device_node *node;
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};
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@ -830,17 +834,26 @@ static int __maybe_unused atmel_pctrl_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct atmel_pioctrl *atmel_pioctrl = platform_get_drvdata(pdev);
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int i;
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int i, j;
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/*
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* For each bank, save IMR to restore it later and disable all GPIO
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* interrupts excepting the ones marked as wakeup sources.
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*/
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for (i = 0; i < atmel_pioctrl->nbanks; i++) {
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atmel_pioctrl->pm_suspend_backup[i] =
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atmel_pioctrl->pm_suspend_backup[i].imr =
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atmel_gpio_read(atmel_pioctrl, i, ATMEL_PIO_IMR);
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atmel_gpio_write(atmel_pioctrl, i, ATMEL_PIO_IDR,
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~atmel_pioctrl->pm_wakeup_sources[i]);
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atmel_pioctrl->pm_suspend_backup[i].odsr =
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atmel_gpio_read(atmel_pioctrl, i, ATMEL_PIO_ODSR);
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for (j = 0; j < ATMEL_PIO_NPINS_PER_BANK; j++) {
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atmel_gpio_write(atmel_pioctrl, i,
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ATMEL_PIO_MSKR, BIT(j));
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atmel_pioctrl->pm_suspend_backup[i].cfgr[j] =
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atmel_gpio_read(atmel_pioctrl, i,
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ATMEL_PIO_CFGR);
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}
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}
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return 0;
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@ -850,11 +863,20 @@ static int __maybe_unused atmel_pctrl_resume(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct atmel_pioctrl *atmel_pioctrl = platform_get_drvdata(pdev);
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int i;
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int i, j;
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for (i = 0; i < atmel_pioctrl->nbanks; i++)
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for (i = 0; i < atmel_pioctrl->nbanks; i++) {
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atmel_gpio_write(atmel_pioctrl, i, ATMEL_PIO_IER,
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atmel_pioctrl->pm_suspend_backup[i]);
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atmel_pioctrl->pm_suspend_backup[i].imr);
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atmel_gpio_write(atmel_pioctrl, i, ATMEL_PIO_SODR,
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atmel_pioctrl->pm_suspend_backup[i].odsr);
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for (j = 0; j < ATMEL_PIO_NPINS_PER_BANK; j++) {
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atmel_gpio_write(atmel_pioctrl, i,
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ATMEL_PIO_MSKR, BIT(j));
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atmel_gpio_write(atmel_pioctrl, i, ATMEL_PIO_CFGR,
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atmel_pioctrl->pm_suspend_backup[i].cfgr[j]);
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}
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}
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return 0;
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}
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