forked from luck/tmp_suning_uos_patched
mtd: nand: rename NAND_USE_FLASH_BBT
Recall the recently added prefix requirements: * "NAND_" for flags in nand.h, used in nand_chip.options * "NAND_BBT_" for flags in bbm.h, used in nand_chip.bbt_options or in nand_bbt_descr.options Thus, I am changing NAND_USE_FLASH_BBT to NAND_BBT_USE_FLASH. Again, this flag is found in bbm.h and so should NOT be used in the "nand_chip.options" field. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
This commit is contained in:
parent
a40f73419f
commit
bb9ebd4e71
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@ -572,7 +572,7 @@ static void board_select_chip (struct mtd_info *mtd, int chip)
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</para>
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<para>
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The simplest way to activate the FLASH based bad block table support
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is to set the option NAND_USE_FLASH_BBT in the bbt_option field of
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is to set the option NAND_BBT_USE_FLASH in the bbt_option field of
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the nand chip structure before calling nand_scan(). For AG-AND
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chips is this done by default.
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This activates the default FLASH based bad block table functionality
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@ -377,7 +377,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
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.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.ecc_bits = 4,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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.bbt_td = &da830_evm_nand_bbt_main_descr,
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.bbt_md = &da830_evm_nand_bbt_mirror_descr,
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.timing = &da830_evm_nandflash_timing,
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@ -225,7 +225,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = {
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.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.ecc_bits = 4,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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.timing = &da850_evm_nandflash_timing,
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};
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@ -77,7 +77,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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.ecc_bits = 4,
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};
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@ -74,7 +74,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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.ecc_mode = NAND_ECC_HW_SYNDROME,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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};
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static struct resource davinci_nand_resources[] = {
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@ -139,7 +139,7 @@ static struct davinci_nand_pdata davinci_nand_data = {
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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.ecc_bits = 4,
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};
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@ -150,7 +150,7 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
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.parts = davinci_evm_nandflash_partition,
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.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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.timing = &davinci_evm_nandflash_timing,
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};
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@ -396,7 +396,7 @@ static struct davinci_nand_pdata mityomapl138_nandflash_data = {
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.parts = mityomapl138_nandflash_partition,
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.nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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.options = NAND_BUSWIDTH_16,
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.ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
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};
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@ -87,7 +87,7 @@ static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
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.parts = davinci_ntosd2_nandflash_partition,
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.nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
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.ecc_mode = NAND_ECC_HW,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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};
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static struct resource davinci_ntosd2_nandflash_resource[] = {
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@ -144,7 +144,7 @@ static struct davinci_nand_pdata nand_config = {
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.parts = nand_partitions,
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.nr_parts = ARRAY_SIZE(nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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.ecc_bits = 1,
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};
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@ -76,7 +76,7 @@ struct davinci_nand_pdata { /* platform_data */
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/* e.g. NAND_BUSWIDTH_16 */
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unsigned options;
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/* e.g. NAND_USE_FLASH_BBT */
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/* e.g. NAND_BBT_USE_FLASH */
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unsigned bbt_options;
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/* Main and mirror bbt descriptor overrides */
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@ -275,7 +275,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = {
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.partitions = ts78xx_ts_nand_parts,
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.nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts),
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.chip_delay = 15,
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.bbt_options = NAND_USE_FLASH_BBT,
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.bbt_options = NAND_BBT_USE_FLASH,
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},
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.ctrl = {
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/*
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@ -163,7 +163,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
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this->ecc.mode = NAND_ECC_SOFT;
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/* Enable the following for a flash based bad block table */
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/* this->bbt_options = NAND_USE_FLASH_BBT; */
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/* this->bbt_options = NAND_BBT_USE_FLASH; */
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/* Scan to find existence of the device */
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if (nand_scan(crisv32_mtd, 1)) {
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@ -154,7 +154,7 @@ struct mtd_info *__init crisv32_nand_flash_probe(void)
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this->ecc.mode = NAND_ECC_SOFT;
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/* Enable the following for a flash based bad block table */
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/* this->bbt_options = NAND_USE_FLASH_BBT; */
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/* this->bbt_options = NAND_BBT_USE_FLASH; */
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/* Scan to find existence of the device */
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if (nand_scan(crisv32_mtd, 1)) {
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@ -583,7 +583,7 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
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if (on_flash_bbt) {
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printk(KERN_INFO "atmel_nand: Use On Flash BBT\n");
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nand_chip->bbt_options |= NAND_USE_FLASH_BBT;
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nand_chip->bbt_options |= NAND_BBT_USE_FLASH;
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}
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if (!cpu_has_dma())
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@ -172,9 +172,9 @@ static int __init autcpu12_init(void)
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/* Enable the following for a flash based bad block table */
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/*
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this->bbt_options = NAND_USE_FLASH_BBT;
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this->bbt_options = NAND_BBT_USE_FLASH;
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*/
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this->bbt_options = NAND_USE_FLASH_BBT;
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this->bbt_options = NAND_BBT_USE_FLASH;
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/* Scan to find existence of the device */
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if (nand_scan(autcpu12_mtd, 1)) {
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@ -474,7 +474,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
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#if NAND_ECC_BCH
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if (board_mtd->writesize > 512) {
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if (this->bbt_options & NAND_USE_FLASH_BBT)
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if (this->bbt_options & NAND_BBT_USE_FLASH)
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largepage_bbt.options = NAND_BBT_SCAN2NDPAGE;
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this->badblock_pattern = &largepage_bbt;
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}
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@ -686,7 +686,7 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
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cafe->nand.chip_delay = 0;
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/* Enable the following for a flash based bad block table */
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cafe->nand.bbt_options = NAND_USE_FLASH_BBT;
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cafe->nand.bbt_options = NAND_BBT_USE_FLASH;
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cafe->nand.options = NAND_NO_AUTOINCR | NAND_OWN_BUFFERS;
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if (skipbbt) {
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@ -239,7 +239,7 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
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this->ecc.correct = nand_correct_data;
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/* Enable the following for a flash based bad block table */
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this->bbt_options = NAND_USE_FLASH_BBT;
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this->bbt_options = NAND_BBT_USE_FLASH;
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this->options = NAND_NO_AUTOINCR;
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/* Scan to find existence of the device */
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@ -581,7 +581,7 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
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info->chip.chip_delay = 0;
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info->chip.select_chip = nand_davinci_select_chip;
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/* options such as NAND_USE_FLASH_BBT */
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/* options such as NAND_BBT_USE_FLASH */
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info->chip.bbt_options = pdata->bbt_options;
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/* options such as 16-bit widths */
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info->chip.options = pdata->options;
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@ -1577,7 +1577,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
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denali->nand.bbt_md = &bbt_mirror_descr;
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/* skip the scan for now until we have OOB read and write support */
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denali->nand.bbt_options |= NAND_USE_FLASH_BBT;
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denali->nand.bbt_options |= NAND_BBT_USE_FLASH;
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denali->nand.options |= NAND_SKIP_BBTSCAN;
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denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME;
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@ -1652,7 +1652,7 @@ static int __init doc_probe(unsigned long physadr)
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nand->ecc.mode = NAND_ECC_HW_SYNDROME;
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nand->ecc.size = 512;
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nand->ecc.bytes = 6;
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nand->bbt_options = NAND_USE_FLASH_BBT;
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nand->bbt_options = NAND_BBT_USE_FLASH;
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doc->physadr = physadr;
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doc->virtadr = virtadr;
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@ -792,7 +792,7 @@ static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)
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/* set up nand options */
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chip->options = NAND_NO_READRDY | NAND_NO_AUTOINCR;
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chip->bbt_options = NAND_USE_FLASH_BBT;
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chip->bbt_options = NAND_BBT_USE_FLASH;
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chip->controller = &elbc_fcm_ctrl->controller;
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chip->priv = priv;
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@ -736,7 +736,7 @@ static int __devinit mpc5121_nfc_probe(struct platform_device *op)
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chip->verify_buf = mpc5121_nfc_verify_buf;
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chip->select_chip = mpc5121_nfc_select_chip;
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chip->options = NAND_NO_AUTOINCR;
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chip->bbt_options = NAND_USE_FLASH_BBT;
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chip->bbt_options = NAND_BBT_USE_FLASH;
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chip->ecc.mode = NAND_ECC_SOFT;
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/* Support external chip-select logic on ADS5121 board */
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@ -1179,7 +1179,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
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this->bbt_td = &bbt_main_descr;
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this->bbt_md = &bbt_mirror_descr;
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/* update flash based bbt */
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this->bbt_options |= NAND_USE_FLASH_BBT;
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this->bbt_options |= NAND_BBT_USE_FLASH;
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}
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init_completion(&host->op_completion);
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@ -405,7 +405,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
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chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
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/* Do we have a flash based bad block table ? */
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if (chip->bbt_options & NAND_USE_FLASH_BBT)
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if (chip->bbt_options & NAND_BBT_USE_FLASH)
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ret = nand_update_bbt(mtd, ofs);
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else {
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nand_get_device(chip, mtd, FL_WRITING);
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@ -14,7 +14,7 @@
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*
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* When nand_scan_bbt is called, then it tries to find the bad block table
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* depending on the options in the BBT descriptor(s). If no flash based BBT
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* (NAND_USE_FLASH_BBT) is specified then the device is scanned for factory
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* (NAND_BBT_USE_FLASH) is specified then the device is scanned for factory
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* marked good / bad blocks. This information is used to create a memory BBT.
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* Once a new bad block is discovered then the "factory" information is updated
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* on the device.
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* The table is marked in the OOB area with an ident pattern and a version
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* number which indicates which of both tables is more up to date. If the NAND
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* controller needs the complete OOB area for the ECC information then the
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* option NAND_BBT_NO_OOB should be used (along with NAND_USE_FLASH_BBT, of
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* option NAND_BBT_NO_OOB should be used (along with NAND_BBT_USE_FLASH, of
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* course): it moves the ident pattern and the version byte into the data area
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* and the OOB area will remain untouched.
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*
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bits = bd->options & NAND_BBT_NRBITS_MSK;
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BUG_ON((this->bbt_options & NAND_BBT_NO_OOB) &&
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!(this->bbt_options & NAND_USE_FLASH_BBT));
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!(this->bbt_options & NAND_BBT_USE_FLASH));
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BUG_ON(!bits);
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if (bd->options & NAND_BBT_VERSION)
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pattern_len++;
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if (bd->options & NAND_BBT_NO_OOB) {
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BUG_ON(!(this->bbt_options & NAND_USE_FLASH_BBT));
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BUG_ON(!(this->bbt_options & NAND_BBT_USE_FLASH));
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BUG_ON(!(this->bbt_options & NAND_BBT_NO_OOB));
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BUG_ON(bd->offs);
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if (bd->options & NAND_BBT_VERSION)
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@ -1357,12 +1357,12 @@ int nand_default_bbt(struct mtd_info *mtd)
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this->bbt_td = &bbt_main_descr;
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this->bbt_md = &bbt_mirror_descr;
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}
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this->bbt_options |= NAND_USE_FLASH_BBT;
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this->bbt_options |= NAND_BBT_USE_FLASH;
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return nand_scan_bbt(mtd, &agand_flashbased);
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}
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/* Is a flash based bad block table requested ? */
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if (this->bbt_options & NAND_USE_FLASH_BBT) {
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if (this->bbt_options & NAND_BBT_USE_FLASH) {
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/* Use the default pattern descriptors */
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if (!this->bbt_td) {
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if (this->bbt_options & NAND_BBT_NO_OOB) {
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@ -2275,7 +2275,7 @@ static int __init ns_init_module(void)
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case 2:
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chip->bbt_options |= NAND_BBT_NO_OOB;
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case 1:
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chip->bbt_options |= NAND_USE_FLASH_BBT;
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chip->bbt_options |= NAND_BBT_USE_FLASH;
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case 0:
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break;
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default:
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@ -156,7 +156,7 @@ static int __devinit pasemi_nand_probe(struct platform_device *ofdev)
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/* Enable the following for a flash based bad block table */
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chip->options = NAND_NO_AUTOINCR;
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chip->bbt_options = NAND_USE_FLASH_BBT;
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chip->bbt_options = NAND_BBT_USE_FLASH;
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/* Scan to find existence of the device */
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if (nand_scan(pasemi_nand_mtd, 1)) {
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@ -881,7 +881,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
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* let the kernel fish out the BBT from the NAND, and also skip the
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* full NAND scan that can take 1/2s or so. Little things... */
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if (set->flash_bbt) {
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chip->bbt_options |= NAND_USE_FLASH_BBT;
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chip->bbt_options |= NAND_BBT_USE_FLASH;
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chip->options |= NAND_SKIP_BBTSCAN;
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}
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}
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@ -104,7 +104,7 @@ struct nand_bbt_descr {
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* Use a flash based bad block table. By default, OOB identifier is saved in
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* OOB area. This option is passed to the default bad block table function.
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*/
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#define NAND_USE_FLASH_BBT 0x00040000
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#define NAND_BBT_USE_FLASH 0x00040000
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/* Do not store flash based bad block table in OOB area; store it in-band */
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#define NAND_BBT_NO_OOB 0x00080000
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