forked from luck/tmp_suning_uos_patched
sh: Move the shared INTC code out to drivers/sh/
The INTC code will be re-used across different architectures, so move this out to drivers/sh/ and include/linux/sh_intc.h respectively. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
parent
7ff731aeba
commit
bbfbd8b151
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@ -2,6 +2,7 @@
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#define __ASM_SH_HW_IRQ_H
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#include <linux/init.h>
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#include <linux/sh_intc.h>
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#include <asm/atomic.h>
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extern atomic_t irq_err_count;
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@ -23,101 +24,12 @@ struct ipr_desc {
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void register_ipr_controller(struct ipr_desc *);
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typedef unsigned char intc_enum;
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struct intc_vect {
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intc_enum enum_id;
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unsigned short vect;
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};
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#define INTC_VECT(enum_id, vect) { enum_id, vect }
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#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
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struct intc_group {
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intc_enum enum_id;
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intc_enum enum_ids[32];
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};
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#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
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struct intc_mask_reg {
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unsigned long set_reg, clr_reg, reg_width;
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intc_enum enum_ids[32];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_prio_reg {
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unsigned long set_reg, clr_reg, reg_width, field_width;
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intc_enum enum_ids[16];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_sense_reg {
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unsigned long reg, reg_width, field_width;
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intc_enum enum_ids[16];
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};
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#ifdef CONFIG_SMP
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#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
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#else
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#define INTC_SMP(stride, nr)
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#endif
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struct intc_desc {
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struct intc_vect *vectors;
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unsigned int nr_vectors;
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struct intc_group *groups;
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unsigned int nr_groups;
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struct intc_mask_reg *mask_regs;
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unsigned int nr_mask_regs;
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struct intc_prio_reg *prio_regs;
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unsigned int nr_prio_regs;
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struct intc_sense_reg *sense_regs;
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unsigned int nr_sense_regs;
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char *name;
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#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
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struct intc_mask_reg *ack_regs;
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unsigned int nr_ack_regs;
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#endif
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};
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#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
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#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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}
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#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
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#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs, ack_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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_INTC_ARRAY(ack_regs), \
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}
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#endif
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void __init register_intc_controller(struct intc_desc *desc);
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int intc_set_priority(unsigned int irq, unsigned int prio);
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void __init plat_irq_setup(void);
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#ifdef CONFIG_CPU_SH3
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void __init plat_irq_setup_sh3(void);
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#endif
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void __init plat_irq_setup_pins(int mode);
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enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
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IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,
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IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
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void __init plat_irq_setup_pins(int mode);
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#endif /* __ASM_SH_HW_IRQ_H */
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@ -1,8 +1,6 @@
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#
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# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
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#
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obj-y += intc.o
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obj-$(CONFIG_SUPERH32) += imask.o
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obj-$(CONFIG_CPU_SH5) += intc-sh5.o
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obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
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@ -1,6 +1,6 @@
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#
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# Makefile for the SuperH specific drivers.
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#
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obj-$(CONFIG_SUPERHYWAY) += superhyway/
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obj-$(CONFIG_MAPLE) += maple/
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obj-y += intc.o
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@ -21,6 +21,7 @@
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#include <linux/io.h>
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#include <linux/interrupt.h>
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#include <linux/bootmem.h>
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#include <linux/sh_intc.h>
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#define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \
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((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \
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91
include/linux/sh_intc.h
Normal file
91
include/linux/sh_intc.h
Normal file
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@ -0,0 +1,91 @@
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#ifndef __SH_INTC_H
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#define __SH_INTC_H
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typedef unsigned char intc_enum;
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struct intc_vect {
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intc_enum enum_id;
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unsigned short vect;
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};
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#define INTC_VECT(enum_id, vect) { enum_id, vect }
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#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
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struct intc_group {
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intc_enum enum_id;
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intc_enum enum_ids[32];
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};
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#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
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struct intc_mask_reg {
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unsigned long set_reg, clr_reg, reg_width;
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intc_enum enum_ids[32];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_prio_reg {
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unsigned long set_reg, clr_reg, reg_width, field_width;
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intc_enum enum_ids[16];
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#ifdef CONFIG_SMP
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unsigned long smp;
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#endif
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};
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struct intc_sense_reg {
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unsigned long reg, reg_width, field_width;
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intc_enum enum_ids[16];
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};
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#ifdef CONFIG_SMP
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#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)
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#else
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#define INTC_SMP(stride, nr)
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#endif
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struct intc_desc {
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struct intc_vect *vectors;
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unsigned int nr_vectors;
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struct intc_group *groups;
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unsigned int nr_groups;
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struct intc_mask_reg *mask_regs;
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unsigned int nr_mask_regs;
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struct intc_prio_reg *prio_regs;
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unsigned int nr_prio_regs;
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struct intc_sense_reg *sense_regs;
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unsigned int nr_sense_regs;
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char *name;
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#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
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struct intc_mask_reg *ack_regs;
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unsigned int nr_ack_regs;
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#endif
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};
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#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
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#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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}
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#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)
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#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \
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mask_regs, prio_regs, sense_regs, ack_regs) \
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struct intc_desc symbol __initdata = { \
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_INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
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_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
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_INTC_ARRAY(sense_regs), \
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chipname, \
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_INTC_ARRAY(ack_regs), \
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}
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#endif
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void __init register_intc_controller(struct intc_desc *desc);
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int intc_set_priority(unsigned int irq, unsigned int prio);
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#endif /* __SH_INTC_H */
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