forked from luck/tmp_suning_uos_patched
powerpc: Fix incorrect timer register addresses in mpic.c
We were computing the wrong address for the MPIC timer registers, so when we went to initialize them we would have been hitting some unrelated ioremap... oops. Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -358,7 +358,7 @@ static void mpic_enable_irq(unsigned int irq)
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = irq - mpic->irq_offset;
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DBG("%s: enable_irq: %d (src %d)\n", mpic->name, irq, src);
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DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
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mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI,
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mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & ~MPIC_VECPRI_MASK);
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@ -511,7 +511,7 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr,
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/* Map the global registers */
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mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000);
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mpic->tmregs = mpic->gregs + (MPIC_TIMER_BASE >> 2);
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mpic->tmregs = mpic->gregs + ((MPIC_TIMER_BASE - MPIC_GREG_BASE) >> 2);
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BUG_ON(mpic->gregs == NULL);
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/* Reset */
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@ -648,7 +648,6 @@ void __init mpic_init(struct mpic *mpic)
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continue;
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irq_desc[mpic->ipi_offset+i].status |= IRQ_PER_CPU;
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irq_desc[mpic->ipi_offset+i].handler = &mpic->hc_ipi;
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#endif /* CONFIG_SMP */
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}
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