forked from luck/tmp_suning_uos_patched
drm/radeon: improve mclk param calcuations for ci dpm
Properly take into account the post divider. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2409,10 +2409,10 @@ static int ci_calculate_mclk_params(struct radeon_device *rdev,
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u32 tmp;
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u32 reference_clock = rdev->clock.mpll.reference_freq;
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if (pi->mem_gddr5)
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freq_nom = memory_clock * 4;
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if (mpll_param.qdr == 1)
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freq_nom = memory_clock * 4 * (1 << mpll_param.post_div);
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else
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freq_nom = memory_clock * 2;
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freq_nom = memory_clock * 2 * (1 << mpll_param.post_div);
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tmp = (freq_nom / reference_clock);
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tmp = tmp * tmp;
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