forked from luck/tmp_suning_uos_patched
PCI: Fix bus resource assignment on 32 bits with 64b resources
The current pci_assign_unassigned_resources() code doesn't work properly on 32 bits platforms with 64 bits resources. The main reason is the use of unsigned long in various places instead of resource_size_t. This is a pre-requisite for making powerpc use the generic code instead of its own half-useful implementation. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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f07234b66a
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c40a22e0ce
@ -89,8 +89,9 @@ void pci_setup_cardbus(struct pci_bus *bus)
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* The IO resource is allocated a range twice as large as it
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* would normally need. This allows us to set both IO regs.
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*/
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printk(" IO window: %08lx-%08lx\n",
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region.start, region.end);
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printk(KERN_INFO " IO window: 0x%08lx-0x%08lx\n",
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(unsigned long)region.start,
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(unsigned long)region.end);
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pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
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region.start);
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pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
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@ -99,8 +100,9 @@ void pci_setup_cardbus(struct pci_bus *bus)
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pcibios_resource_to_bus(bridge, ®ion, bus->resource[1]);
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if (bus->resource[1]->flags & IORESOURCE_IO) {
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printk(" IO window: %08lx-%08lx\n",
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region.start, region.end);
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printk(KERN_INFO " IO window: 0x%08lx-0x%08lx\n",
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(unsigned long)region.start,
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(unsigned long)region.end);
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pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
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region.start);
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pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
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@ -109,8 +111,9 @@ void pci_setup_cardbus(struct pci_bus *bus)
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pcibios_resource_to_bus(bridge, ®ion, bus->resource[2]);
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if (bus->resource[2]->flags & IORESOURCE_MEM) {
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printk(" PREFETCH window: %08lx-%08lx\n",
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region.start, region.end);
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printk(KERN_INFO " PREFETCH window: 0x%08lx-0x%08lx\n",
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(unsigned long)region.start,
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(unsigned long)region.end);
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pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
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region.start);
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pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
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@ -119,8 +122,9 @@ void pci_setup_cardbus(struct pci_bus *bus)
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pcibios_resource_to_bus(bridge, ®ion, bus->resource[3]);
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if (bus->resource[3]->flags & IORESOURCE_MEM) {
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printk(" MEM window: %08lx-%08lx\n",
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region.start, region.end);
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printk(KERN_INFO " MEM window: 0x%08lx-0x%08lx\n",
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(unsigned long)region.start,
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(unsigned long)region.end);
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pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
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region.start);
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pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
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@ -145,7 +149,7 @@ pci_setup_bridge(struct pci_bus *bus)
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{
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struct pci_dev *bridge = bus->self;
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struct pci_bus_region region;
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u32 l, io_upper16;
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u32 l, bu, lu, io_upper16;
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DBG(KERN_INFO "PCI: Bridge: %s\n", pci_name(bridge));
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@ -159,7 +163,8 @@ pci_setup_bridge(struct pci_bus *bus)
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/* Set up upper 16 bits of I/O base/limit. */
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io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
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DBG(KERN_INFO " IO window: %04lx-%04lx\n",
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region.start, region.end);
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(unsigned long)region.start,
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(unsigned long)region.end);
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}
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else {
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/* Clear upper 16 bits of I/O base/limit. */
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@ -180,8 +185,9 @@ pci_setup_bridge(struct pci_bus *bus)
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if (bus->resource[1]->flags & IORESOURCE_MEM) {
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l = (region.start >> 16) & 0xfff0;
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l |= region.end & 0xfff00000;
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DBG(KERN_INFO " MEM window: %08lx-%08lx\n",
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region.start, region.end);
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DBG(KERN_INFO " MEM window: 0x%08lx-0x%08lx\n",
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(unsigned long)region.start,
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(unsigned long)region.end);
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}
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else {
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l = 0x0000fff0;
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@ -195,12 +201,18 @@ pci_setup_bridge(struct pci_bus *bus)
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pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, 0);
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/* Set up PREF base/limit. */
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bu = lu = 0;
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pcibios_resource_to_bus(bridge, ®ion, bus->resource[2]);
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if (bus->resource[2]->flags & IORESOURCE_PREFETCH) {
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l = (region.start >> 16) & 0xfff0;
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l |= region.end & 0xfff00000;
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DBG(KERN_INFO " PREFETCH window: %08lx-%08lx\n",
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region.start, region.end);
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#ifdef CONFIG_RESOURCES_64BIT
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bu = region.start >> 32;
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lu = region.end >> 32;
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#endif
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DBG(KERN_INFO " PREFETCH window: 0x%016llx-0x%016llx\n",
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(unsigned long long)region.start,
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(unsigned long long)region.end);
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}
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else {
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l = 0x0000fff0;
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@ -208,8 +220,9 @@ pci_setup_bridge(struct pci_bus *bus)
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}
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pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
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/* Clear out the upper 32 bits of PREF base. */
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pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, 0);
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/* Set the upper 32 bits of PREF base & limit. */
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pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, bu);
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pci_write_config_dword(bridge, PCI_PREF_LIMIT_UPPER32, lu);
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pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, bus->bridge_ctl);
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}
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@ -323,8 +336,8 @@ static void pbus_size_io(struct pci_bus *bus)
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static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long type)
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{
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struct pci_dev *dev;
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unsigned long min_align, align, size;
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unsigned long aligns[12]; /* Alignments from 1Mb to 2Gb */
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resource_size_t min_align, align, size;
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resource_size_t aligns[12]; /* Alignments from 1Mb to 2Gb */
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int order, max_order;
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struct resource *b_res = find_free_bus_resource(bus, type);
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@ -340,7 +353,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long
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for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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struct resource *r = &dev->resource[i];
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unsigned long r_size;
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resource_size_t r_size;
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if (r->parent || (r->flags & mask) != type)
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continue;
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@ -350,10 +363,10 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long
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order = __ffs(align) - 20;
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if (order > 11) {
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printk(KERN_WARNING "PCI: region %s/%d "
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"too large: %llx-%llx\n",
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"too large: 0x%016llx-0x%016llx\n",
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pci_name(dev), i,
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(unsigned long long)r->start,
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(unsigned long long)r->end);
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(unsigned long long)r->start,
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(unsigned long long)r->end);
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r->flags = 0;
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continue;
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}
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@ -372,8 +385,11 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask, unsigned long
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align = 0;
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min_align = 0;
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for (order = 0; order <= max_order; order++) {
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unsigned long align1 = 1UL << (order + 20);
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#ifdef CONFIG_RESOURCES_64BIT
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resource_size_t align1 = 1ULL << (order + 20);
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#else
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resource_size_t align1 = 1U << (order + 20);
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#endif
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if (!align)
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min_align = align1;
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else if (ALIGN(align + min_align, min_align) < align1)
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@ -309,8 +309,8 @@ struct pci_raw_ops {
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extern struct pci_raw_ops *raw_pci_ops;
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struct pci_bus_region {
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unsigned long start;
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unsigned long end;
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resource_size_t start;
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resource_size_t end;
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};
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struct pci_dynids {
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