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clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM

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The PRCM takes PLL_PERIPH0 as one of its parents for the AR100 clock.
As such we need to be able to describe this relationship in the device
tree.

Export the PLL_PERIPH0 clock so we can reference it in the PRCM node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai 2017-05-31 15:58:21 +08:00 committed by Maxime Ripard
parent a91afc974e
commit c4be8c68e6
2 changed files with 5 additions and 1 deletions
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4
drivers/clk/sunxi-ng/ccu-sun8i-h3.h
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@ -29,7 +29,9 @@
#define CLK_PLL_VIDEO 6 #define CLK_PLL_VIDEO 6
#define CLK_PLL_VE 7 #define CLK_PLL_VE 7
#define CLK_PLL_DDR 8 #define CLK_PLL_DDR 8
#define CLK_PLL_PERIPH0 9
/* PLL_PERIPH0 exported for PRCM */
#define CLK_PLL_PERIPH0_2X 10 #define CLK_PLL_PERIPH0_2X 10
#define CLK_PLL_GPU 11 #define CLK_PLL_GPU 11
#define CLK_PLL_PERIPH1 12 #define CLK_PLL_PERIPH1 12

2
include/dt-bindings/clock/sun8i-h3-ccu.h
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@ -43,6 +43,8 @@
#ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_ #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
#define _DT_BINDINGS_CLK_SUN8I_H3_H_ #define _DT_BINDINGS_CLK_SUN8I_H3_H_
#define CLK_PLL_PERIPH0 9
#define CLK_CPUX 14 #define CLK_CPUX 14
#define CLK_BUS_CE 20 #define CLK_BUS_CE 20