forked from luck/tmp_suning_uos_patched
drm/nv20-nv30: move context table object out of dev_priv
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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ac94a343c7
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@ -333,6 +333,9 @@ struct nouveau_pgraph_engine {
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bool accel_blocked;
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int grctx_size;
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/* NV2x/NV3x context table (0x400780) */
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struct nouveau_gpuobj_ref *ctx_table;
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int (*init)(struct drm_device *);
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void (*takedown)(struct drm_device *);
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@ -580,10 +583,6 @@ struct drm_nouveau_private {
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struct drm_mm ramin_heap;
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/* context table pointed to be NV_PGRAPH_CHANNEL_CTX_TABLE (0x400780) */
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uint32_t ctx_table_size;
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struct nouveau_gpuobj_ref *ctx_table;
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struct list_head gpuobj_list;
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struct nvbios vbios;
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@ -416,8 +416,8 @@ nv20_graph_create_context(struct nouveau_channel *chan)
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nv_wo32(dev, chan->ramin_grctx->gpuobj, idoffs,
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(chan->id << 24) | 0x1); /* CTX_USER */
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nv_wo32(dev, dev_priv->ctx_table->gpuobj, chan->id,
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chan->ramin_grctx->instance >> 4);
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nv_wo32(dev, pgraph->ctx_table->gpuobj, chan->id,
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chan->ramin_grctx->instance >> 4);
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return 0;
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}
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@ -426,11 +426,12 @@ nv20_graph_destroy_context(struct nouveau_channel *chan)
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{
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struct drm_device *dev = chan->dev;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
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if (chan->ramin_grctx)
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nouveau_gpuobj_ref_del(dev, &chan->ramin_grctx);
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nv_wo32(dev, dev_priv->ctx_table->gpuobj, chan->id, 0);
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nv_wo32(dev, pgraph->ctx_table->gpuobj, chan->id, 0);
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}
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int
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@ -522,8 +523,7 @@ nv20_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
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int
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nv20_graph_init(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv =
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(struct drm_nouveau_private *)dev->dev_private;
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
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uint32_t tmp, vramsz;
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int ret, i;
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@ -550,19 +550,17 @@ nv20_graph_init(struct drm_device *dev)
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nv_wr32(dev, NV03_PMC_ENABLE,
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nv_rd32(dev, NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH);
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if (!dev_priv->ctx_table) {
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if (!pgraph->ctx_table) {
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/* Create Context Pointer Table */
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dev_priv->ctx_table_size = 32 * 4;
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ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
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dev_priv->ctx_table_size, 16,
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ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 32 * 4, 16,
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NVOBJ_FLAG_ZERO_ALLOC,
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&dev_priv->ctx_table);
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&pgraph->ctx_table);
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if (ret)
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return ret;
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}
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nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE,
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dev_priv->ctx_table->instance >> 4);
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pgraph->ctx_table->instance >> 4);
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nv20_graph_rdi(dev);
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@ -646,8 +644,9 @@ void
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nv20_graph_takedown(struct drm_device *dev)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
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nouveau_gpuobj_ref_del(dev, &dev_priv->ctx_table);
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nouveau_gpuobj_ref_del(dev, &pgraph->ctx_table);
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}
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int
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@ -680,19 +679,17 @@ nv30_graph_init(struct drm_device *dev)
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nv_wr32(dev, NV03_PMC_ENABLE,
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nv_rd32(dev, NV03_PMC_ENABLE) | NV_PMC_ENABLE_PGRAPH);
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if (!dev_priv->ctx_table) {
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if (!pgraph->ctx_table) {
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/* Create Context Pointer Table */
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dev_priv->ctx_table_size = 32 * 4;
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ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0,
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dev_priv->ctx_table_size, 16,
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ret = nouveau_gpuobj_new_ref(dev, NULL, NULL, 0, 32 * 4, 16,
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NVOBJ_FLAG_ZERO_ALLOC,
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&dev_priv->ctx_table);
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&pgraph->ctx_table);
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if (ret)
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return ret;
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}
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nv_wr32(dev, NV20_PGRAPH_CHANNEL_CTX_TABLE,
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dev_priv->ctx_table->instance >> 4);
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pgraph->ctx_table->instance >> 4);
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nv_wr32(dev, NV03_PGRAPH_INTR , 0xFFFFFFFF);
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nv_wr32(dev, NV03_PGRAPH_INTR_EN, 0xFFFFFFFF);
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