forked from luck/tmp_suning_uos_patched
[CPUFREQ] architectural pstate driver for powernow-k8
This patch should apply cleanly to the 2.6.23-git7 kernel. It changes the powernow-k8 driver code that deals with 3rd generation Opteron, Phenom, and later processors to match the architectural pstate driver described in the AMD64 Architecture Programmer's Manual Volume 2 Chapter 18. The initial implementation of the hardware pstate driver for PowerNow! used some processor-version specific features, and would not be maintainable in the long term as the processor features changed. This architectural driver should work on all future AMD processors. Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Dave Jones <davej@redhat.com>
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@ -46,7 +46,7 @@
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#define PFX "powernow-k8: "
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#define BFX PFX "BIOS error: "
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#define VERSION "version 2.00.00"
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#define VERSION "version 2.20.00"
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#include "powernow-k8.h"
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/* serialize freq changes */
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@ -73,33 +73,11 @@ static u32 find_khz_freq_from_fid(u32 fid)
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return 1000 * find_freq_from_fid(fid);
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}
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/* Return a frequency in MHz, given an input fid and did */
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static u32 find_freq_from_fiddid(u32 fid, u32 did)
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static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 pstate)
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{
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if (current_cpu_data.x86 == 0x10)
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return 100 * (fid + 0x10) >> did;
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else
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return 100 * (fid + 0x8) >> did;
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return data[pstate].frequency;
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}
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static u32 find_khz_freq_from_fiddid(u32 fid, u32 did)
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{
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return 1000 * find_freq_from_fiddid(fid, did);
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}
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static u32 find_fid_from_pstate(u32 pstate)
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{
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u32 hi, lo;
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rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
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return lo & HW_PSTATE_FID_MASK;
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}
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static u32 find_did_from_pstate(u32 pstate)
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{
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u32 hi, lo;
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rdmsr(MSR_PSTATE_DEF_BASE + pstate, lo, hi);
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return (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
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}
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/* Return the vco fid for an input fid
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*
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@ -142,9 +120,7 @@ static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
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if (cpu_family == CPU_HW_PSTATE) {
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rdmsr(MSR_PSTATE_STATUS, lo, hi);
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i = lo & HW_PSTATE_MASK;
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rdmsr(MSR_PSTATE_DEF_BASE + i, lo, hi);
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data->currfid = lo & HW_PSTATE_FID_MASK;
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data->currdid = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
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data->currpstate = i;
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return 0;
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}
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do {
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@ -295,7 +271,7 @@ static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid,
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static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
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{
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wrmsr(MSR_PSTATE_CTRL, pstate, 0);
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data->currfid = find_fid_from_pstate(pstate);
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data->currpstate = pstate;
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return 0;
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}
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@ -845,17 +821,20 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
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static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
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{
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int i;
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u32 hi = 0, lo = 0;
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rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
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data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
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for (i = 0; i < data->acpi_data.state_count; i++) {
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u32 index;
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u32 hi = 0, lo = 0;
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u32 fid;
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u32 did;
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index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
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if (index > MAX_HW_PSTATE) {
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if (index > data->max_hw_pstate) {
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printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
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printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
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powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
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continue;
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}
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rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
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if (!(hi & HW_PSTATE_VALID_MASK)) {
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@ -864,22 +843,9 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpuf
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continue;
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}
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fid = lo & HW_PSTATE_FID_MASK;
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did = (lo & HW_PSTATE_DID_MASK) >> HW_PSTATE_DID_SHIFT;
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powernow_table[i].index = index;
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dprintk(" %d : fid 0x%x, did 0x%x\n", index, fid, did);
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powernow_table[i].index = index | (fid << HW_FID_INDEX_SHIFT) | (did << HW_DID_INDEX_SHIFT);
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powernow_table[i].frequency = find_khz_freq_from_fiddid(fid, did);
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if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
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printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
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powernow_table[i].frequency,
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(unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
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powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
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continue;
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}
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powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
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}
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return 0;
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}
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@ -1020,22 +986,18 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
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/* Take a frequency, and issue the hardware pstate transition command */
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static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
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{
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u32 fid = 0;
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u32 did = 0;
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u32 pstate = 0;
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int res, i;
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struct cpufreq_freqs freqs;
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dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
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/* get fid did for hardware pstate transition */
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/* get MSR index for hardware pstate transition */
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pstate = index & HW_PSTATE_MASK;
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if (pstate > MAX_HW_PSTATE)
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if (pstate > data->max_hw_pstate)
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return 0;
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fid = (index & HW_FID_INDEX_MASK) >> HW_FID_INDEX_SHIFT;
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did = (index & HW_DID_INDEX_MASK) >> HW_DID_INDEX_SHIFT;
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freqs.old = find_khz_freq_from_fiddid(data->currfid, data->currdid);
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freqs.new = find_khz_freq_from_fiddid(fid, did);
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freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
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freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
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for_each_cpu_mask(i, *(data->available_cores)) {
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freqs.cpu = i;
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@ -1043,9 +1005,7 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
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}
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res = transition_pstate(data, pstate);
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data->currfid = find_fid_from_pstate(pstate);
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data->currdid = find_did_from_pstate(pstate);
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freqs.new = find_khz_freq_from_fiddid(data->currfid, data->currdid);
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freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
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for_each_cpu_mask(i, *(data->available_cores)) {
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freqs.cpu = i;
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@ -1090,10 +1050,7 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
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if (query_current_values_with_pending_wait(data))
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goto err_out;
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if (cpu_family == CPU_HW_PSTATE)
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dprintk("targ: curr fid 0x%x, did 0x%x\n",
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data->currfid, data->currdid);
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else {
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if (cpu_family != CPU_HW_PSTATE) {
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dprintk("targ: curr fid 0x%x, vid 0x%x\n",
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data->currfid, data->currvid);
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@ -1124,7 +1081,7 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
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mutex_unlock(&fidvid_mutex);
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if (cpu_family == CPU_HW_PSTATE)
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pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
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pol->cur = find_khz_freq_from_pstate(data->powernow_table, newstate);
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else
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pol->cur = find_khz_freq_from_fid(data->currfid);
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ret = 0;
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@ -1223,7 +1180,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
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+ (3 * (1 << data->irt) * 10)) * 1000;
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if (cpu_family == CPU_HW_PSTATE)
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pol->cur = find_khz_freq_from_fiddid(data->currfid, data->currdid);
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pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
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else
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pol->cur = find_khz_freq_from_fid(data->currfid);
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dprintk("policy current frequency %d kHz\n", pol->cur);
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@ -1240,8 +1197,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
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cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
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if (cpu_family == CPU_HW_PSTATE)
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dprintk("cpu_init done, current fid 0x%x, did 0x%x\n",
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data->currfid, data->currdid);
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dprintk("cpu_init done, current pstate 0x%x\n", data->currpstate);
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else
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dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
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data->currfid, data->currvid);
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@ -1297,7 +1253,7 @@ static unsigned int powernowk8_get (unsigned int cpu)
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goto out;
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if (cpu_family == CPU_HW_PSTATE)
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khz = find_khz_freq_from_fiddid(data->currfid, data->currdid);
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khz = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
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else
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khz = find_khz_freq_from_fid(data->currfid);
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@ -10,6 +10,7 @@ struct powernow_k8_data {
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u32 numps; /* number of p-states */
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u32 batps; /* number of p-states supported on battery */
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u32 max_hw_pstate; /* maximum legal hardware pstate */
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/* these values are constant when the PSB is used to determine
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* vid/fid pairings, but are modified during the ->target() call
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@ -21,8 +22,8 @@ struct powernow_k8_data {
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u32 plllock; /* pll lock time, units 1 us */
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u32 exttype; /* extended interface = 1 */
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/* keep track of the current fid / vid or did */
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u32 currvid, currfid, currdid;
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/* keep track of the current fid / vid or pstate */
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u32 currvid, currfid, currpstate;
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/* the powernow_table includes all frequency and vid/fid pairings:
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* fid are the lower 8 bits of the index, vid are the upper 8 bits.
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@ -87,23 +88,14 @@ struct powernow_k8_data {
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/* Hardware Pstate _PSS and MSR definitions */
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#define USE_HW_PSTATE 0x00000080
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#define HW_PSTATE_FID_MASK 0x0000003f
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#define HW_PSTATE_DID_MASK 0x000001c0
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#define HW_PSTATE_DID_SHIFT 6
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#define HW_PSTATE_MASK 0x00000007
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#define HW_PSTATE_VALID_MASK 0x80000000
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#define HW_FID_INDEX_SHIFT 8
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#define HW_FID_INDEX_MASK 0x0000ff00
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#define HW_DID_INDEX_SHIFT 16
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#define HW_DID_INDEX_MASK 0x00ff0000
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#define HW_WATTS_MASK 0xff
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#define HW_PWR_DVR_MASK 0x300
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#define HW_PWR_DVR_SHIFT 8
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#define HW_PWR_MAX_MULT 3
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#define MAX_HW_PSTATE 8 /* hw pstate supports up to 8 */
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#define HW_PSTATE_MAX_MASK 0x000000f0
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#define HW_PSTATE_MAX_SHIFT 4
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#define MSR_PSTATE_DEF_BASE 0xc0010064 /* base of Pstate MSRs */
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#define MSR_PSTATE_STATUS 0xc0010063 /* Pstate Status MSR */
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#define MSR_PSTATE_CTRL 0xc0010062 /* Pstate control MSR */
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#define MSR_PSTATE_CUR_LIMIT 0xc0010061 /* pstate current limit MSR */
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/* define the two driver architectures */
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#define CPU_OPTERON 0
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