forked from luck/tmp_suning_uos_patched
ASoC: Actively manage WM8903 DC servo configuration
Explicitly cache the DC servo offsets for digital paths in the driver, allowing them to be preserved over suspend and resume, and ensure that we recalibrate analogue outputs paths when they are in use so that we cover any changes in the input offset. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
This commit is contained in:
Mark Brown
parent
fa9879edeb
commit
c5b6a9feae
@ -223,6 +223,9 @@ struct wm8903_priv {
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int fs;
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int deemph;
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int dcs_pending;
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int dcs_cache[4];
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/* Reference count */
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int class_w_users;
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@ -248,6 +251,10 @@ static int wm8903_volatile_register(struct snd_soc_codec *codec, unsigned int re
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case WM8903_WRITE_SEQUENCER_4:
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case WM8903_POWER_MANAGEMENT_3:
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case WM8903_POWER_MANAGEMENT_2:
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case WM8903_DC_SERVO_READBACK_1:
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case WM8903_DC_SERVO_READBACK_2:
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case WM8903_DC_SERVO_READBACK_3:
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case WM8903_DC_SERVO_READBACK_4:
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return 1;
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default:
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@ -315,6 +322,103 @@ static int wm8903_cp_event(struct snd_soc_dapm_widget *w,
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return 0;
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}
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static int wm8903_dcs_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_codec *codec = w->codec;
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struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
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switch (event) {
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case SND_SOC_DAPM_POST_PMU:
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wm8903->dcs_pending |= 1 << w->shift;
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break;
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case SND_SOC_DAPM_PRE_PMD:
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snd_soc_update_bits(codec, WM8903_DC_SERVO_0,
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1 << w->shift, 0);
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break;
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}
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return 0;
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}
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#define WM8903_DCS_MODE_WRITE_STOP 0
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#define WM8903_DCS_MODE_START_STOP 2
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static void wm8903_seq_notifier(struct snd_soc_dapm_context *dapm,
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enum snd_soc_dapm_type event, int subseq)
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{
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struct snd_soc_codec *codec = container_of(dapm,
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struct snd_soc_codec, dapm);
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struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
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int dcs_mode = WM8903_DCS_MODE_WRITE_STOP;
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int i, val;
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/* Complete any pending DC servo starts */
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if (wm8903->dcs_pending) {
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dev_dbg(codec->dev, "Starting DC servo for %x\n",
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wm8903->dcs_pending);
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/* If we've no cached values then we need to do startup */
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for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
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if (!(wm8903->dcs_pending & (1 << i)))
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continue;
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if (wm8903->dcs_cache[i]) {
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dev_dbg(codec->dev,
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"Restore DC servo %d value %x\n",
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3 - i, wm8903->dcs_cache[i]);
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snd_soc_write(codec, WM8903_DC_SERVO_4 + i,
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wm8903->dcs_cache[i] & 0xff);
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} else {
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dev_dbg(codec->dev,
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"Calibrate DC servo %d\n", 3 - i);
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dcs_mode = WM8903_DCS_MODE_START_STOP;
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}
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}
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/* Don't trust the cache for analogue */
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if (wm8903->class_w_users)
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dcs_mode = WM8903_DCS_MODE_START_STOP;
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snd_soc_update_bits(codec, WM8903_DC_SERVO_2,
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WM8903_DCS_MODE_MASK, dcs_mode);
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snd_soc_update_bits(codec, WM8903_DC_SERVO_0,
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WM8903_DCS_ENA_MASK, wm8903->dcs_pending);
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switch (dcs_mode) {
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case WM8903_DCS_MODE_WRITE_STOP:
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break;
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case WM8903_DCS_MODE_START_STOP:
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msleep(270);
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/* Cache the measured offsets for digital */
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if (wm8903->class_w_users)
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break;
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for (i = 0; i < ARRAY_SIZE(wm8903->dcs_cache); i++) {
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if (!(wm8903->dcs_pending & (1 << i)))
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continue;
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val = snd_soc_read(codec,
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WM8903_DC_SERVO_READBACK_1 + i);
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dev_dbg(codec->dev, "DC servo %d: %x\n",
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3 - i, val);
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wm8903->dcs_cache[i] = val;
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}
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break;
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default:
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pr_warn("DCS mode %d delay not set\n", dcs_mode);
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break;
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}
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wm8903->dcs_pending = 0;
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}
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}
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/*
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* When used with DAC outputs only the WM8903 charge pump supports
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* operation in class W mode, providing very low power consumption
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@ -847,10 +951,15 @@ SND_SOC_DAPM_PGA_S("LINEOUTR_ENA_OUTP", 3, WM8903_ANALOGUE_LINEOUT_0, 2, 0,
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SND_SOC_DAPM_PGA_S("LINEOUTR_ENA_DLY", 1, WM8903_ANALOGUE_LINEOUT_0, 1, 0,
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NULL, 0),
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SND_SOC_DAPM_PGA_S("HPL_DCS", 3, WM8903_DC_SERVO_0, 3, 0, NULL, 0),
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SND_SOC_DAPM_PGA_S("HPR_DCS", 3, WM8903_DC_SERVO_0, 2, 0, NULL, 0),
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SND_SOC_DAPM_PGA_S("LINEOUTL_DCS", 3, WM8903_DC_SERVO_0, 1, 0, NULL, 0),
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SND_SOC_DAPM_PGA_S("LINEOUTR_DCS", 3, WM8903_DC_SERVO_0, 0, 0, NULL, 0),
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SND_SOC_DAPM_SUPPLY("DCS Master", WM8903_DC_SERVO_0, 4, 0, NULL, 0),
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SND_SOC_DAPM_PGA_S("HPL_DCS", 3, SND_SOC_NOPM, 3, 0, wm8903_dcs_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_PGA_S("HPR_DCS", 3, SND_SOC_NOPM, 2, 0, wm8903_dcs_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_PGA_S("LINEOUTL_DCS", 3, SND_SOC_NOPM, 1, 0, wm8903_dcs_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_PGA_S("LINEOUTR_DCS", 3, SND_SOC_NOPM, 0, 0, wm8903_dcs_event,
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SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
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SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5, 1, 0,
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NULL, 0),
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@ -979,6 +1088,11 @@ static const struct snd_soc_dapm_route intercon[] = {
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{ "LINEOUTL_ENA_DLY", NULL, "Left Line Output PGA" },
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{ "LINEOUTR_ENA_DLY", NULL, "Right Line Output PGA" },
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{ "HPL_DCS", NULL, "DCS Master" },
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{ "HPR_DCS", NULL, "DCS Master" },
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{ "LINEOUTL_DCS", NULL, "DCS Master" },
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{ "LINEOUTR_DCS", NULL, "DCS Master" },
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{ "HPL_DCS", NULL, "HPL_ENA_DLY" },
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{ "HPR_DCS", NULL, "HPR_ENA_DLY" },
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{ "LINEOUTL_DCS", NULL, "LINEOUTL_ENA_DLY" },
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@ -1901,6 +2015,7 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8903 = {
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.reg_word_size = sizeof(u16),
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.reg_cache_default = wm8903_reg_defaults,
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.volatile_register = wm8903_volatile_register,
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.seq_notifier = wm8903_seq_notifier,
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};
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#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
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@ -75,6 +75,14 @@ extern int wm8903_mic_detect(struct snd_soc_codec *codec,
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#define WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0 0x41
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#define WM8903_DC_SERVO_0 0x43
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#define WM8903_DC_SERVO_2 0x45
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#define WM8903_DC_SERVO_4 0x47
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#define WM8903_DC_SERVO_5 0x48
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#define WM8903_DC_SERVO_6 0x49
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#define WM8903_DC_SERVO_7 0x4A
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#define WM8903_DC_SERVO_READBACK_1 0x51
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#define WM8903_DC_SERVO_READBACK_2 0x52
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#define WM8903_DC_SERVO_READBACK_3 0x53
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#define WM8903_DC_SERVO_READBACK_4 0x54
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#define WM8903_ANALOGUE_HP_0 0x5A
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#define WM8903_ANALOGUE_LINEOUT_0 0x5E
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#define WM8903_CHARGE_PUMP_0 0x62
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