ASoC: Handle startup sequencing of WM8958 DSP2 with deferred clocking

The DSP2 startup requires that the clock be enable so if we've deferred
clock startup we need to defer DSP2 startup

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
This commit is contained in:
Mark Brown 2011-03-11 18:13:12 +00:00
parent f701a2e594
commit c6b7b57012
2 changed files with 17 additions and 21 deletions

View File

@ -69,6 +69,13 @@ static void wm8958_mbc_apply(struct snd_soc_codec *codec, int mbc, int start)
if (reg & WM8958_DSP2_ENA)
return;
/* If neither AIFnCLK is not yet enabled postpone */
if (!(snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
& WM8994_AIF1CLK_ENA_MASK) &&
!(snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
& WM8994_AIF2CLK_ENA_MASK))
return;
/* Switch the clock over to the appropriate AIF */
snd_soc_update_bits(codec, WM8994_CLOCKING_1,
WM8958_DSP2CLK_SRC | WM8958_DSP2CLK_ENA,
@ -120,32 +127,18 @@ int wm8958_aif_ev(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
int mbc;
switch (w->shift) {
case 13:
case 12:
mbc = 2;
break;
case 11:
case 10:
mbc = 1;
break;
case 9:
case 8:
mbc = 0;
break;
default:
BUG();
return -EINVAL;
}
int i;
switch (event) {
case SND_SOC_DAPM_POST_PMU:
wm8958_mbc_apply(codec, mbc, 1);
case SND_SOC_DAPM_PRE_PMU:
for (i = 0; i < 3; i++)
wm8958_mbc_apply(codec, i, 1);
break;
case SND_SOC_DAPM_POST_PMD:
wm8958_mbc_apply(codec, mbc, 0);
case SND_SOC_DAPM_PRE_PMD:
for (i = 0; i < 3; i++)
wm8958_mbc_apply(codec, i, 0);
break;
}

View File

@ -759,6 +759,9 @@ static int late_enable_ev(struct snd_soc_dapm_widget *w,
break;
}
/* We may also have postponed startup of DSP, handle that. */
wm8958_aif_ev(w, kcontrol, event);
return 0;
}