forked from luck/tmp_suning_uos_patched
ARM: 5914/1: Modify PL031 for Nomadik and U8500 v2
This extends the existing PrimeCell PL031 driver with support for the ST Microelectronics and ST-Ericsson derivatives, in a first and second version as used on the Nomadik and U8500 platforms. It also rids the old ioctl() alarm on/off functions in favor of the new .alarm_irq_enable field of the RTC class ops. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Linus Walleij
Russell King
parent
d48a41c181
commit
c72881e837
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@ -7,6 +7,9 @@
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*
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* Copyright 2006 (c) MontaVista Software, Inc.
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*
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* Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
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* Copyright 2010 (c) ST-Ericsson AB
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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@ -18,6 +21,9 @@
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#include <linux/interrupt.h>
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#include <linux/amba/bus.h>
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#include <linux/io.h>
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#include <linux/bcd.h>
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#include <linux/delay.h>
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#include <linux/version.h>
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/*
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* Register definitions
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@ -30,35 +36,207 @@
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#define RTC_RIS 0x14 /* Raw interrupt status register */
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#define RTC_MIS 0x18 /* Masked interrupt status register */
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#define RTC_ICR 0x1c /* Interrupt clear register */
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/* ST variants have additional timer functionality */
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#define RTC_TDR 0x20 /* Timer data read register */
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#define RTC_TLR 0x24 /* Timer data load register */
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#define RTC_TCR 0x28 /* Timer control register */
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#define RTC_YDR 0x30 /* Year data read register */
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#define RTC_YMR 0x34 /* Year match register */
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#define RTC_YLR 0x38 /* Year data load register */
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#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
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#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
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/* Common bit definitions for Interrupt status and control registers */
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#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
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#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
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/* Common bit definations for ST v2 for reading/writing time */
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#define RTC_SEC_SHIFT 0
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#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
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#define RTC_MIN_SHIFT 6
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#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
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#define RTC_HOUR_SHIFT 12
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#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
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#define RTC_WDAY_SHIFT 17
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#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
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#define RTC_MDAY_SHIFT 20
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#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
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#define RTC_MON_SHIFT 25
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#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
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#define RTC_TIMER_FREQ 32768
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struct pl031_local {
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struct rtc_device *rtc;
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void __iomem *base;
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u8 hw_designer;
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u8 hw_revision:4;
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};
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static irqreturn_t pl031_interrupt(int irq, void *dev_id)
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static int pl031_alarm_irq_enable(struct device *dev,
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unsigned int enabled)
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{
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struct rtc_device *rtc = dev_id;
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struct pl031_local *ldata = dev_get_drvdata(dev);
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unsigned long imsc;
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rtc_update_irq(rtc, 1, RTC_AF);
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/* Clear any pending alarm interrupts. */
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writel(RTC_BIT_AI, ldata->base + RTC_ICR);
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return IRQ_HANDLED;
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imsc = readl(ldata->base + RTC_IMSC);
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if (enabled == 1)
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writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
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else
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writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
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return 0;
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}
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static int pl031_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
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/*
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* Convert Gregorian date to ST v2 RTC format.
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*/
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static int pl031_stv2_tm_to_time(struct device *dev,
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struct rtc_time *tm, unsigned long *st_time,
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unsigned long *bcd_year)
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{
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int year = tm->tm_year + 1900;
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int wday = tm->tm_wday;
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/* wday masking is not working in hardware so wday must be valid */
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if (wday < -1 || wday > 6) {
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dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
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return -EINVAL;
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} else if (wday == -1) {
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/* wday is not provided, calculate it here */
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unsigned long time;
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struct rtc_time calc_tm;
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rtc_tm_to_time(tm, &time);
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rtc_time_to_tm(time, &calc_tm);
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wday = calc_tm.tm_wday;
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}
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*bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
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*st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
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| (tm->tm_mday << RTC_MDAY_SHIFT)
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| ((wday + 1) << RTC_WDAY_SHIFT)
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| (tm->tm_hour << RTC_HOUR_SHIFT)
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| (tm->tm_min << RTC_MIN_SHIFT)
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| (tm->tm_sec << RTC_SEC_SHIFT);
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return 0;
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}
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/*
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* Convert ST v2 RTC format to Gregorian date.
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*/
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static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
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struct rtc_time *tm)
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{
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tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
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tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
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tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
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tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
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tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
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tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
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tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
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tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
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tm->tm_year -= 1900;
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return 0;
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}
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static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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switch (cmd) {
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case RTC_AIE_OFF:
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writel(1, ldata->base + RTC_MIS);
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return 0;
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case RTC_AIE_ON:
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writel(0, ldata->base + RTC_MIS);
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return 0;
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pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
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readl(ldata->base + RTC_YDR), tm);
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return 0;
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}
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static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned long time;
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unsigned long bcd_year;
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struct pl031_local *ldata = dev_get_drvdata(dev);
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int ret;
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ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
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if (ret == 0) {
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writel(bcd_year, ldata->base + RTC_YLR);
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writel(time, ldata->base + RTC_LR);
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}
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return -ENOIOCTLCMD;
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return ret;
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}
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static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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int ret;
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ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
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readl(ldata->base + RTC_YMR), &alarm->time);
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alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
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alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
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return ret;
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}
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static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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unsigned long time;
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unsigned long bcd_year;
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int ret;
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/* At the moment, we can only deal with non-wildcarded alarm times. */
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ret = rtc_valid_tm(&alarm->time);
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if (ret == 0) {
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ret = pl031_stv2_tm_to_time(dev, &alarm->time,
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&time, &bcd_year);
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if (ret == 0) {
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writel(bcd_year, ldata->base + RTC_YMR);
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writel(time, ldata->base + RTC_MR);
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pl031_alarm_irq_enable(dev, alarm->enabled);
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}
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}
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return ret;
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}
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static irqreturn_t pl031_interrupt(int irq, void *dev_id)
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{
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struct pl031_local *ldata = dev_id;
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unsigned long rtcmis;
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unsigned long events = 0;
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rtcmis = readl(ldata->base + RTC_MIS);
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if (rtcmis) {
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writel(rtcmis, ldata->base + RTC_ICR);
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if (rtcmis & RTC_BIT_AI)
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events |= (RTC_AF | RTC_IRQF);
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/* Timer interrupt is only available in ST variants */
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if ((rtcmis & RTC_BIT_PI) &&
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(ldata->hw_designer == AMBA_VENDOR_ST))
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events |= (RTC_PF | RTC_IRQF);
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rtc_update_irq(ldata->rtc, 1, events);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static int pl031_read_time(struct device *dev, struct rtc_time *tm)
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@ -74,11 +252,14 @@ static int pl031_set_time(struct device *dev, struct rtc_time *tm)
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{
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unsigned long time;
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struct pl031_local *ldata = dev_get_drvdata(dev);
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int ret;
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rtc_tm_to_time(tm, &time);
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writel(time, ldata->base + RTC_LR);
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ret = rtc_tm_to_time(tm, &time);
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return 0;
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if (ret == 0)
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writel(time, ldata->base + RTC_LR);
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return ret;
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}
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static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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@ -86,8 +267,9 @@ static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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struct pl031_local *ldata = dev_get_drvdata(dev);
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rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
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alarm->pending = readl(ldata->base + RTC_RIS);
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alarm->enabled = readl(ldata->base + RTC_IMSC);
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alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
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alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
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return 0;
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}
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@ -96,22 +278,71 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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unsigned long time;
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int ret;
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rtc_tm_to_time(&alarm->time, &time);
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/* At the moment, we can only deal with non-wildcarded alarm times. */
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ret = rtc_valid_tm(&alarm->time);
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if (ret == 0) {
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ret = rtc_tm_to_time(&alarm->time, &time);
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if (ret == 0) {
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writel(time, ldata->base + RTC_MR);
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pl031_alarm_irq_enable(dev, alarm->enabled);
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}
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}
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writel(time, ldata->base + RTC_MR);
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writel(!alarm->enabled, ldata->base + RTC_MIS);
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return ret;
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}
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/* Periodic interrupt is only available in ST variants. */
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static int pl031_irq_set_state(struct device *dev, int enabled)
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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if (enabled == 1) {
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/* Clear any pending timer interrupt. */
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writel(RTC_BIT_PI, ldata->base + RTC_ICR);
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writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI,
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ldata->base + RTC_IMSC);
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/* Now start the timer */
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writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN,
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ldata->base + RTC_TCR);
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} else {
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writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
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ldata->base + RTC_IMSC);
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/* Also stop the timer */
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writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
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ldata->base + RTC_TCR);
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}
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/* Wait at least 1 RTC32 clock cycle to ensure next access
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* to RTC_TCR will succeed.
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*/
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udelay(40);
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return 0;
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}
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static const struct rtc_class_ops pl031_ops = {
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.ioctl = pl031_ioctl,
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.read_time = pl031_read_time,
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.set_time = pl031_set_time,
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.read_alarm = pl031_read_alarm,
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.set_alarm = pl031_set_alarm,
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};
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static int pl031_irq_set_freq(struct device *dev, int freq)
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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/* Cant set timer if it is already enabled */
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if (readl(ldata->base + RTC_TCR) & RTC_TCR_EN) {
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dev_err(dev, "can't change frequency while timer enabled\n");
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return -EINVAL;
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}
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/* If self start bit in RTC_TCR is set timer will start here,
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* but we never set that bit. Instead we start the timer when
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* set_state is called with enabled == 1.
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*/
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writel(RTC_TIMER_FREQ / freq, ldata->base + RTC_TLR);
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return 0;
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}
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static int pl031_remove(struct amba_device *adev)
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{
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@ -131,18 +362,20 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
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{
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int ret;
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struct pl031_local *ldata;
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struct rtc_class_ops *ops = id->data;
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ret = amba_request_regions(adev, NULL);
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if (ret)
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goto err_req;
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ldata = kmalloc(sizeof(struct pl031_local), GFP_KERNEL);
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ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL);
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if (!ldata) {
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ret = -ENOMEM;
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goto out;
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}
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ldata->base = ioremap(adev->res.start, resource_size(&adev->res));
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if (!ldata->base) {
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ret = -ENOMEM;
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goto out_no_remap;
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@ -150,24 +383,36 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
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amba_set_drvdata(adev, ldata);
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if (request_irq(adev->irq[0], pl031_interrupt, IRQF_DISABLED,
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"rtc-pl031", ldata->rtc)) {
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ret = -EIO;
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goto out_no_irq;
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}
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ldata->hw_designer = amba_manf(adev);
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ldata->hw_revision = amba_rev(adev);
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ldata->rtc = rtc_device_register("pl031", &adev->dev, &pl031_ops,
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THIS_MODULE);
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dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer);
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dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision);
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/* Enable the clockwatch on ST Variants */
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if ((ldata->hw_designer == AMBA_VENDOR_ST) &&
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(ldata->hw_revision > 1))
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writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN,
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ldata->base + RTC_CR);
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ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
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THIS_MODULE);
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if (IS_ERR(ldata->rtc)) {
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ret = PTR_ERR(ldata->rtc);
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goto out_no_rtc;
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}
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if (request_irq(adev->irq[0], pl031_interrupt,
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IRQF_DISABLED | IRQF_SHARED, "rtc-pl031", ldata)) {
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ret = -EIO;
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goto out_no_irq;
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}
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return 0;
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out_no_rtc:
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free_irq(adev->irq[0], ldata->rtc);
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out_no_irq:
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rtc_device_unregister(ldata->rtc);
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out_no_rtc:
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iounmap(ldata->base);
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amba_set_drvdata(adev, NULL);
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out_no_remap:
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|
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@ -175,13 +420,57 @@ static int pl031_probe(struct amba_device *adev, struct amba_id *id)
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out:
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amba_release_regions(adev);
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err_req:
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return ret;
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}
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/* Operations for the original ARM version */
|
||||
static struct rtc_class_ops arm_pl031_ops = {
|
||||
.read_time = pl031_read_time,
|
||||
.set_time = pl031_set_time,
|
||||
.read_alarm = pl031_read_alarm,
|
||||
.set_alarm = pl031_set_alarm,
|
||||
.alarm_irq_enable = pl031_alarm_irq_enable,
|
||||
};
|
||||
|
||||
/* The First ST derivative */
|
||||
static struct rtc_class_ops stv1_pl031_ops = {
|
||||
.read_time = pl031_read_time,
|
||||
.set_time = pl031_set_time,
|
||||
.read_alarm = pl031_read_alarm,
|
||||
.set_alarm = pl031_set_alarm,
|
||||
.alarm_irq_enable = pl031_alarm_irq_enable,
|
||||
.irq_set_state = pl031_irq_set_state,
|
||||
.irq_set_freq = pl031_irq_set_freq,
|
||||
};
|
||||
|
||||
/* And the second ST derivative */
|
||||
static struct rtc_class_ops stv2_pl031_ops = {
|
||||
.read_time = pl031_stv2_read_time,
|
||||
.set_time = pl031_stv2_set_time,
|
||||
.read_alarm = pl031_stv2_read_alarm,
|
||||
.set_alarm = pl031_stv2_set_alarm,
|
||||
.alarm_irq_enable = pl031_alarm_irq_enable,
|
||||
.irq_set_state = pl031_irq_set_state,
|
||||
.irq_set_freq = pl031_irq_set_freq,
|
||||
};
|
||||
|
||||
static struct amba_id pl031_ids[] __initdata = {
|
||||
{
|
||||
.id = 0x00041031,
|
||||
.mask = 0x000fffff,
|
||||
.data = &arm_pl031_ops,
|
||||
},
|
||||
/* ST Micro variants */
|
||||
{
|
||||
.id = 0x00180031,
|
||||
.mask = 0x00ffffff,
|
||||
.data = &stv1_pl031_ops,
|
||||
},
|
||||
{
|
||||
.id = 0x00280031,
|
||||
.mask = 0x00ffffff,
|
||||
.data = &stv2_pl031_ops,
|
||||
},
|
||||
{0, 0},
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user