AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

First round of fixes for meson clocks targeted for v4.17

Browse Source 
- fix typos in two meson8 clock names
  - remove unused clock ops declaration
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE9OFZrhjz9W1fG7cb5vwPHDfy2oUFAlrgTfIACgkQ5vwPHDfy
 2oUvSxAApnug8+v18u+rIojj35YpEG8X24O2Pg7R2fLJIymNcC/ocb1IU8tqfeqy
 qYfsC+SyxZlyEQpx1YTO2cUMX4z2rISK1JpFsck3hbgLi+DkMZ7tqa10+i+IaCTB
 CLGsfc2BKNhqYEHdAP9CPnCTimS1c+/AM1dtuLaT59ZOP1EnUMSZ5g3w7pNc+qOb
 Kjp5+sBpkGIlikWIuyURsUQUWZ8eBhDLyW0jlExYRUp9eyo5dM0fpPU+UBMECaHx
 lvqAyVOlqRc24H5J38ovB4JjmeQiZ54JfZ6qRmz+z9oi6MQ/IS1f4WFUCFYSXgeP
 vE0JMgbWNbNNCSS9W+TGf0GOVbGjd5RIv+acQaybZ0hfIyJaC/WrYxdYkDA4Hv6D
 2lh8JEeRA/wBaGfJu18KsJzXZqpG6r9PkVZisBOqUXf1cLKA8LJDiM8KUadV4w0z
 1kUlLCc8yrxwP0xj3XzBorvgsXoRwIwfIV4Oz2FLz9c4Nkojpm+wdNLBI7Zkzt8d
 28ulE9J9j96JhieS7Wl1YkRtPZYq4XPw2LjbuDp/Yp7NN9tPsbcAFg4YaV7gqrLW
 phMtqk2b9G3uk+x+9WdPuNBpOyC+I6Hs1OYSXpOyCeC4dqk+XR8jfAVo57Gk3+HG
 Gv0plGRhmFmoILpbaPbxR1othpsSc9gq+CutFJrSzuSWkkVLNhw=
 =ksxI
 -----END PGP SIGNATURE-----

Merge tag 'meson-clk-fixes-4.17-1' of https://github.com/BayLibre/clk-meson into clk-fixes

Pull meson clk fixes from Jerome Brunet:
 - fix typos in two meson8 clock names
 - remove unused clock ops declaration

* tag 'meson-clk-fixes-4.17-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: meson8b: fix meson8b_cpu_clk parent clock name
  clk: meson: meson8b: fix meson8b_fclk_div3_div clock name
  clk: meson: drop meson_aoclk_gate_regmap_ops
This commit is contained in:
Stephen Boyd 2018-05-01 14:44:16 -07:00
commit c964cfc612
2 changed files with 3 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/clk/meson/gxbb-aoclk.h
View File

@ -17,8 +17,6 @@
#define AO_RTC_ALT_CLK_CNTL0 0x94
#define AO_RTC_ALT_CLK_CNTL1 0x98
extern const struct clk_ops meson_aoclk_gate_regmap_ops;
struct aoclk_cec_32k {
struct clk_hw hw;
struct regmap *regmap;

5
drivers/clk/meson/meson8b.c
View File

@ -253,7 +253,7 @@ static struct clk_fixed_factor meson8b_fclk_div3_div = {
.mult = 1,
.div = 3,
.hw.init = &(struct clk_init_data){
.name = "fclk_div_div3",
.name = "fclk_div3_div",
.ops = &clk_fixed_factor_ops,
.parent_names = (const char *[]){ "fixed_pll" },
.num_parents = 1,
@ -632,7 +632,8 @@ static struct clk_regmap meson8b_cpu_clk = {
.hw.init = &(struct clk_init_data){
.name = "cpu_clk",
.ops = &clk_regmap_mux_ro_ops,
.parent_names = (const char *[]){ "xtal", "cpu_out_sel" },
.parent_names = (const char *[]){ "xtal",
"cpu_scale_out_sel" },
.num_parents = 2,
.flags = (CLK_SET_RATE_PARENT |
CLK_SET_RATE_NO_REPARENT),