forked from luck/tmp_suning_uos_patched
amd64_edac: Cleanup NBCTL code
Remove family names from macro names, drop single bit defines and comment their meaning instead. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
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@ -2196,21 +2196,20 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
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struct pci_dev *F3)
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{
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bool ret = true;
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u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
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u32 value, mask = 0x3; /* UECC/CECC enable */
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if (toggle_ecc_err_reporting(s, nid, ON)) {
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amd64_warn("Error enabling ECC reporting over MCGCTL!\n");
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return false;
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}
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amd64_read_pci_cfg(F3, K8_NBCTL, &value);
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amd64_read_pci_cfg(F3, NBCTL, &value);
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/* turn on UECCEn and CECCEn bits */
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s->old_nbctl = value & mask;
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s->nbctl_valid = true;
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value |= mask;
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amd64_write_pci_cfg(F3, K8_NBCTL, value);
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amd64_write_pci_cfg(F3, NBCTL, value);
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amd64_read_pci_cfg(F3, K8_NBCFG, &value);
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@ -2250,16 +2249,17 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
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static void restore_ecc_error_reporting(struct ecc_settings *s, u8 nid,
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struct pci_dev *F3)
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{
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u32 value, mask = K8_NBCTL_CECCEn | K8_NBCTL_UECCEn;
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u32 value, mask = 0x3; /* UECC/CECC enable */
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if (!s->nbctl_valid)
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return;
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amd64_read_pci_cfg(F3, K8_NBCTL, &value);
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amd64_read_pci_cfg(F3, NBCTL, &value);
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value &= ~mask;
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value |= s->old_nbctl;
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amd64_write_pci_cfg(F3, K8_NBCTL, value);
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amd64_write_pci_cfg(F3, NBCTL, value);
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/* restore previous BIOS DRAM ECC "off" setting we force-enabled */
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if (!s->flags.nb_ecc_prev) {
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@ -244,13 +244,7 @@
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/*
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* Function 3 - Misc Control
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*/
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#define K8_NBCTL 0x40
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/* Correctable ECC error reporting enable */
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#define K8_NBCTL_CECCEn BIT(0)
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/* UnCorrectable ECC error reporting enable */
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#define K8_NBCTL_UECCEn BIT(1)
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#define NBCTL 0x40
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#define K8_NBCFG 0x44
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#define K8_NBCFG_CHIPKILL BIT(23)
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