forked from luck/tmp_suning_uos_patched
MIPS: KVM: Abstract guest ASID mask
In preparation for supporting varied widths of ASID mask in the kernel in general, switch KVM's guest ASIDs to a new KVM_ENTRYHI_ASID definition based on the 8-bit MIPS_ENTRYHI_ASID instead of ASID_MASK. It could potentially be used to support extended guest ASIDs in the future. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13207/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -311,17 +311,18 @@ enum emulation_result {
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#define MIPS3_PG_FRAME 0x3fffffc0
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#define VPN2_MASK 0xffffe000
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#define KVM_ENTRYHI_ASID MIPS_ENTRYHI_ASID
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#define TLB_IS_GLOBAL(x) (((x).tlb_lo0 & MIPS3_PG_G) && \
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((x).tlb_lo1 & MIPS3_PG_G))
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#define TLB_VPN2(x) ((x).tlb_hi & VPN2_MASK)
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#define TLB_ASID(x) ((x).tlb_hi & ASID_MASK)
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#define TLB_ASID(x) ((x).tlb_hi & KVM_ENTRYHI_ASID)
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#define TLB_IS_VALID(x, va) (((va) & (1 << PAGE_SHIFT)) \
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? ((x).tlb_lo1 & MIPS3_PG_V) \
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: ((x).tlb_lo0 & MIPS3_PG_V))
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#define TLB_HI_VPN2_HIT(x, y) ((TLB_VPN2(x) & ~(x).tlb_mask) == \
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((y) & VPN2_MASK & ~(x).tlb_mask))
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#define TLB_HI_ASID_HIT(x, y) (TLB_IS_GLOBAL(x) || \
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TLB_ASID(x) == ((y) & ASID_MASK))
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TLB_ASID(x) == ((y) & KVM_ENTRYHI_ASID))
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struct kvm_mips_tlb {
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long tlb_mask;
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@ -1068,15 +1068,15 @@ enum emulation_result kvm_mips_emulate_CP0(uint32_t inst, uint32_t *opc,
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kvm_read_c0_guest_ebase(cop0));
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} else if (rd == MIPS_CP0_TLB_HI && sel == 0) {
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uint32_t nasid =
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vcpu->arch.gprs[rt] & ASID_MASK;
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vcpu->arch.gprs[rt] & KVM_ENTRYHI_ASID;
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if ((KSEGX(vcpu->arch.gprs[rt]) != CKSEG0) &&
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((kvm_read_c0_guest_entryhi(cop0) &
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ASID_MASK) != nasid)) {
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KVM_ENTRYHI_ASID) != nasid)) {
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kvm_debug("MTCz, change ASID from %#lx to %#lx\n",
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kvm_read_c0_guest_entryhi(cop0)
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& ASID_MASK,
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& KVM_ENTRYHI_ASID,
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vcpu->arch.gprs[rt]
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& ASID_MASK);
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& KVM_ENTRYHI_ASID);
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/* Blow away the shadow host TLBs */
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kvm_mips_flush_host_tlb(1);
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@ -1620,7 +1620,7 @@ enum emulation_result kvm_mips_emulate_cache(uint32_t inst, uint32_t *opc,
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*/
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index = kvm_mips_guest_tlb_lookup(vcpu, (va & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi
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(cop0) & ASID_MASK));
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(cop0) & KVM_ENTRYHI_ASID));
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if (index < 0) {
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vcpu->arch.host_cp0_entryhi = (va & VPN2_MASK);
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@ -1786,7 +1786,7 @@ enum emulation_result kvm_mips_emulate_tlbmiss_ld(unsigned long cause,
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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struct kvm_vcpu_arch *arch = &vcpu->arch;
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unsigned long entryhi = (vcpu->arch. host_cp0_badvaddr & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
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(kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID);
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if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
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/* save old pc */
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@ -1833,7 +1833,7 @@ enum emulation_result kvm_mips_emulate_tlbinv_ld(unsigned long cause,
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struct kvm_vcpu_arch *arch = &vcpu->arch;
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unsigned long entryhi =
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(vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
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(kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID);
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if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
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/* save old pc */
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@ -1878,7 +1878,7 @@ enum emulation_result kvm_mips_emulate_tlbmiss_st(unsigned long cause,
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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struct kvm_vcpu_arch *arch = &vcpu->arch;
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unsigned long entryhi = (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
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(kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID);
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if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
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/* save old pc */
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@ -1922,7 +1922,7 @@ enum emulation_result kvm_mips_emulate_tlbinv_st(unsigned long cause,
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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struct kvm_vcpu_arch *arch = &vcpu->arch;
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unsigned long entryhi = (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
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(kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID);
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if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
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/* save old pc */
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@ -1967,7 +1967,7 @@ enum emulation_result kvm_mips_handle_tlbmod(unsigned long cause, uint32_t *opc,
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#ifdef DEBUG
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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unsigned long entryhi = (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
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(kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID);
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int index;
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/* If address not in the guest TLB, then we are in trouble */
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@ -1994,7 +1994,7 @@ enum emulation_result kvm_mips_emulate_tlbmod(unsigned long cause,
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{
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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unsigned long entryhi = (vcpu->arch.host_cp0_badvaddr & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(cop0) & ASID_MASK);
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(kvm_read_c0_guest_entryhi(cop0) & KVM_ENTRYHI_ASID);
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struct kvm_vcpu_arch *arch = &vcpu->arch;
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if ((kvm_read_c0_guest_status(cop0) & ST0_EXL) == 0) {
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@ -2569,7 +2569,8 @@ enum emulation_result kvm_mips_handle_tlbmiss(unsigned long cause,
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*/
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index = kvm_mips_guest_tlb_lookup(vcpu,
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(va & VPN2_MASK) |
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(kvm_read_c0_guest_entryhi(vcpu->arch.cop0) & ASID_MASK));
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(kvm_read_c0_guest_entryhi(vcpu->arch.cop0) &
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KVM_ENTRYHI_ASID));
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if (index < 0) {
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if (exccode == EXCCODE_TLBL) {
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er = kvm_mips_emulate_tlbmiss_ld(cause, opc, run, vcpu);
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@ -748,7 +748,8 @@ uint32_t kvm_get_inst(uint32_t *opc, struct kvm_vcpu *vcpu)
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inst = *(opc);
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} else {
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vpn2 = (unsigned long) opc & VPN2_MASK;
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asid = kvm_read_c0_guest_entryhi(cop0) & ASID_MASK;
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asid = kvm_read_c0_guest_entryhi(cop0) &
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KVM_ENTRYHI_ASID;
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index = kvm_mips_guest_tlb_lookup(vcpu, vpn2 | asid);
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if (index < 0) {
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kvm_err("%s: get_user_failed for %p, vcpu: %p, ASID: %#lx\n",
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