AcoSail/kernel_optimize_test
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ASoC: Always syncronize audio transfers on frames

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All these steps are required for ASoC to behave correctly.
rccr and xccr are format dependent, for example TDM audio
has different values than I2S or DSP_A. Also the
omap_mcbsp_xmit_enable and/or omap_mcbsp_recv_enable must
be called right after the DMA has started.
This provides no longer L and R channels switching at random.

Signed-off-by: Eero Nurkkala <ext-eero.nurkkala@nokia.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Eero Nurkkala 2009-08-20 16:18:24 +03:00 committed by Mark Brown
parent c721bbdad7
commit ca6e2ce086
1 changed files with 9 additions and 0 deletions
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9
sound/soc/omap/omap-mcbsp.c
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@ -191,6 +191,11 @@ static int omap_mcbsp_dai_trigger(struct snd_pcm_substream *substream, int cmd,
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
mcbsp_data->active++;
omap_mcbsp_start(mcbsp_data->bus_id, play, !play);
/* Make sure data transfer is frame synchronized */
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
omap_mcbsp_xmit_enable(mcbsp_data->bus_id, 1);
else
omap_mcbsp_recv_enable(mcbsp_data->bus_id, 1);
break;
case SNDRV_PCM_TRIGGER_STOP:
@ -336,11 +341,15 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
/* 1-bit data delay */
regs->rcr2 |= RDATDLY(1);
regs->xcr2 |= XDATDLY(1);
regs->rccr |= RFULL_CYCLE | RDMAEN | RDISABLE;
regs->xccr |= (DXENDLY(1) | XDMAEN | XDISABLE);
break;
case SND_SOC_DAIFMT_DSP_A:
/* 1-bit data delay */
regs->rcr2 |= RDATDLY(1);
regs->xcr2 |= XDATDLY(1);
regs->rccr |= RFULL_CYCLE | RDMAEN | RDISABLE;
regs->xccr |= (DXENDLY(1) | XDMAEN | XDISABLE);
/* Invert FS polarity configuration */
temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
break;