forked from luck/tmp_suning_uos_patched
firewire: Don't touch DMA descriptors after appending.
When a DMA descriptor is appended to the context we sync it for DMA and the device might potentially read it immediately. So, we can't set the IRQ bits in the descriptor after appending. Signed-off-by: Kristian Høgsberg <krh@redhat.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
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d2746dc192
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cb2d2cdbc6
@ -1621,15 +1621,15 @@ ohci_queue_iso_receive_dualbuffer(struct fw_iso_context *base,
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page_bus = page_private(buffer->pages[page]);
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db->second_buffer = cpu_to_le32(page_bus + offset);
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if (p->interrupt && length == rest)
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db->control |= cpu_to_le16(descriptor_irq_always);
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context_append(&ctx->context, d, z, header_z);
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offset = (offset + length) & ~PAGE_MASK;
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rest -= length;
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page++;
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}
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if (p->interrupt)
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db->control |= cpu_to_le16(descriptor_irq_always);
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return 0;
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}
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@ -1668,6 +1668,9 @@ ohci_queue_iso_receive_bufferfill(struct fw_iso_context *base,
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d->req_count = cpu_to_le16(length);
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d->res_count = cpu_to_le16(length);
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if (packet->interrupt && length == rest)
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d->control |= cpu_to_le16(descriptor_irq_always);
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context_append(&ctx->context, d, 1, 0);
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offset = (offset + length) & ~PAGE_MASK;
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@ -1675,9 +1678,6 @@ ohci_queue_iso_receive_bufferfill(struct fw_iso_context *base,
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page++;
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}
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if (packet->interrupt)
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d->control |= cpu_to_le16(descriptor_irq_always);
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return 0;
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}
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