forked from luck/tmp_suning_uos_patched
[PATCH] SPI: devices can require LSB-first encodings
Add spi_device hook for LSB-first word encoding, and update all the (in-tree) controller drivers to reject such devices. Eventually, some controller drivers will be updated to support lsb-first encodings on the wire; no current drivers need this. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -187,13 +187,22 @@ int spi_bitbang_setup(struct spi_device *spi)
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if (!spi->max_speed_hz)
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return -EINVAL;
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bitbang = spi_master_get_devdata(spi->master);
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/* REVISIT: some systems will want to support devices using lsb-first
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* bit encodings on the wire. In pure software that would be trivial,
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* just bitbang_txrx_le_cphaX() routines shifting the other way, and
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* some hardware controllers also have this support.
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*/
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if ((spi->mode & SPI_LSB_FIRST) != 0)
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return -EINVAL;
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if (!cs) {
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cs = kzalloc(sizeof *cs, SLAB_KERNEL);
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if (!cs)
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return -ENOMEM;
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spi->controller_state = cs;
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}
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bitbang = spi_master_get_devdata(spi->master);
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if (!spi->bits_per_word)
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spi->bits_per_word = 8;
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@ -35,10 +35,13 @@ extern struct bus_type spi_bus_type;
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* @chip-select: Chipselect, distinguishing chips handled by "master".
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* @mode: The spi mode defines how data is clocked out and in.
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* This may be changed by the device's driver.
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* The "active low" default for chipselect mode can be overridden,
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* as can the "MSB first" default for each word in a transfer.
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* @bits_per_word: Data transfers involve one or more words; word sizes
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* like eight or 12 bits are common. In-memory wordsizes are
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* powers of two bytes (e.g. 20 bit samples use 32 bits).
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* This may be changed by the device's driver.
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* This may be changed by the device's driver, or left at the
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* default (0) indicating protocol words are eight bit bytes.
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* The spi_transfer.bits_per_word can override this for each transfer.
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* @irq: Negative, or the number passed to request_irq() to receive
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* interrupts from this device.
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@ -67,6 +70,7 @@ struct spi_device {
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#define SPI_MODE_2 (SPI_CPOL|0)
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#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
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#define SPI_CS_HIGH 0x04 /* chipselect active high? */
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#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
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u8 bits_per_word;
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int irq;
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void *controller_state;
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@ -75,7 +79,6 @@ struct spi_device {
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// likely need more hooks for more protocol options affecting how
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// the controller talks to each chip, like:
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// - bit order (default is wordwise msb-first)
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// - memory packing (12 bit samples into low bits, others zeroed)
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// - priority
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// - drop chipselect after each word
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