forked from luck/tmp_suning_uos_patched
ARM: S3C64XX: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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387c31c7e5
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@ -127,7 +127,7 @@ int s3c64xx_sclk_ctrl(struct clk *clk, int enable)
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return s3c64xx_gate(S3C_SCLK_GATE, clk, enable);
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}
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "nand",
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.id = -1,
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@ -834,10 +834,6 @@ static struct clk *clks[] __initdata = {
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void __init s3c64xx_register_clocks(unsigned long xtal,
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unsigned armclk_divlimit)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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armclk_mask = armclk_divlimit;
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s3c24xx_register_baseclocks(xtal);
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@ -845,17 +841,8 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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