forked from luck/tmp_suning_uos_patched
for-5.3/libata-20190708
-----BEGIN PGP SIGNATURE----- iQJEBAABCAAuFiEEwPw5LcreJtl1+l5K99NY+ylx4KYFAl0jrJYQHGF4Ym9lQGtl cm5lbC5kawAKCRD301j7KXHgph+gEADWLWfSuVlLlhtihYHHDRRzSuxE6VlIDtVi d/y/aRv12qoJ7DZS4/dXN74luWfF3bS3gagu9nNAcfqd8ZqmpylGD1HTrU2tyj4I 9RgHIhDv4bTDJjjhp1LCk/K384Ayk6X/0I9KuM36V85+tOsJk1LW/KOeix4IcAwb 7/a49IhANBILp210zttIYu2vJLUjRAT8DLoF1Cb+jnu79sjAGNUpAnBwhgwCjMWp 66bFOwXtfQZAEfkglIQPNdR/aOsUzhAGl/FnFQ961HPkeleVQKpVjL+1rtUsv9k2 p5b00oDAx5D66/ILpfgRSZ/4h/ZqpL/PZBSJ4jfSCIOKaiPGt7AffVeGE5N/VTG6 qsAq9YW5Ew/CIR6beUOR7RGvr3LXx5Q7TBTx/GE75hgk95uMbS4arcVeOh87+7/F eJm9Xl1wcGm36OCxVvjBSLgfs4fgJrkhF3GlhmS6PPjEH9zeYo+uKJZ3AIcOMXv9 8nxoO4tzlkY4emTG7ccytsRUxIZZLP/1oYT/3S7h1GtKYCRHJAm0gs8k9MyH+ZVp UpA4sSWugaD+f9yP/4AU+L8vhxVDa0eWOuVOm0sjwJNXIYY1Kwik1FxzgzlUkkyP 78a3ugxQHz8OUpd5rJREcw4bPigL8dsDfsKEf78DdBtkZ3aNgpCQz1fNenC08+eR mwc1K+MQBg== =nbLD -----END PGP SIGNATURE----- Merge tag 'for-5.3/libata-20190708' of git://git.kernel.dk/linux-block Pull libata updates from Jens Axboe: "These are the changes that are reviewed, tested, and queued up for this merge window. This contains: - Removal of redundant memset after dmam_alloc_coherent (Fuqian) - Expand blacklist check for ST1000LM024, making it independent of firmware version (Hans) - Request sense fix (Tejun) - ahci_sunxi FIFO fix (Uenal)" * tag 'for-5.3/libata-20190708' of git://git.kernel.dk/linux-block: drivers: ata: ahci_sunxi: Increased SATA/AHCI DMA TX/RX FIFOs libata: Drop firmware version check from the ST1000LM024 quirk ata: sata_sil24: Remove call to memset after dmam_alloc_coherent ata:sata_qstor: Remove call to memset after dmam_alloc_coherent ata: sata_nv: Remove call to memset after dmam_alloc_coherent ata: pdc_adma: Remove call to memset after dmam_alloc_coherent ata: libahci: Remove call to memset after dmam_alloc_coherent ata: acard-ahci: Remove call to memset after dmam_alloc_coherent libata: don't request sense data on !ZAC ATA devices
This commit is contained in:
commit
cdc5ffc410
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@ -344,7 +344,6 @@ static int acard_ahci_port_start(struct ata_port *ap)
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mem = dmam_alloc_coherent(dev, dma_sz, &mem_dma, GFP_KERNEL);
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if (!mem)
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return -ENOMEM;
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memset(mem, 0, dma_sz);
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/*
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* First item in chunk of DMA memory: 32-slot command table,
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@ -149,8 +149,51 @@ static void ahci_sunxi_start_engine(struct ata_port *ap)
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void __iomem *port_mmio = ahci_port_base(ap);
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struct ahci_host_priv *hpriv = ap->host->private_data;
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/* Setup DMA before DMA start */
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sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ff00, 0x00004400);
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/* Setup DMA before DMA start
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*
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* NOTE: A similar SoC with SATA/AHCI by Texas Instruments documents
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* this Vendor Specific Port (P0DMACR, aka PxDMACR) in its
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* User's Guide document (TMS320C674x/OMAP-L1x Processor
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* Serial ATA (SATA) Controller, Literature Number: SPRUGJ8C,
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* March 2011, Chapter 4.33 Port DMA Control Register (P0DMACR),
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* p.68, https://www.ti.com/lit/ug/sprugj8c/sprugj8c.pdf)
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* as equivalent to the following struct:
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*
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* struct AHCI_P0DMACR_t
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* {
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* unsigned TXTS : 4;
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* unsigned RXTS : 4;
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* unsigned TXABL : 4;
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* unsigned RXABL : 4;
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* unsigned Reserved : 16;
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* };
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*
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* TXTS: Transmit Transaction Size (TX_TRANSACTION_SIZE).
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* This field defines the DMA transaction size in DWORDs for
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* transmit (system bus read, device write) operation. [...]
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*
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* RXTS: Receive Transaction Size (RX_TRANSACTION_SIZE).
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* This field defines the Port DMA transaction size in DWORDs
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* for receive (system bus write, device read) operation. [...]
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*
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* TXABL: Transmit Burst Limit.
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* This field allows software to limit the VBUSP master read
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* burst size. [...]
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*
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* RXABL: Receive Burst Limit.
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* Allows software to limit the VBUSP master write burst
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* size. [...]
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*
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* Reserved: Reserved.
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*
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*
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* NOTE: According to the above document, the following alternative
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* to the code below could perhaps be a better option
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* (or preparation) for possible further improvements later:
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* sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ffff,
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* 0x00000033);
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*/
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sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ffff, 0x00004433);
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/* Start DMA */
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sunxi_setbits(port_mmio + PORT_CMD, PORT_CMD_START);
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@ -2365,7 +2365,6 @@ static int ahci_port_start(struct ata_port *ap)
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mem = dmam_alloc_coherent(dev, dma_sz, &mem_dma, GFP_KERNEL);
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if (!mem)
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return -ENOMEM;
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memset(mem, 0, dma_sz);
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/*
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* First item in chunk of DMA memory: 32-slot command table,
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@ -4462,9 +4462,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
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/* drives which fail FPDMA_AA activation (some may freeze afterwards)
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the ST disks also have LPM issues */
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{ "ST1000LM024 HN-M101MBB", "2AR10001", ATA_HORKAGE_BROKEN_FPDMA_AA |
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ATA_HORKAGE_NOLPM, },
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{ "ST1000LM024 HN-M101MBB", "2BA30001", ATA_HORKAGE_BROKEN_FPDMA_AA |
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{ "ST1000LM024 HN-M101MBB", NULL, ATA_HORKAGE_BROKEN_FPDMA_AA |
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ATA_HORKAGE_NOLPM, },
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{ "VB0250EAVER", "HPG7", ATA_HORKAGE_BROKEN_FPDMA_AA },
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@ -1469,7 +1469,7 @@ static int ata_eh_read_log_10h(struct ata_device *dev,
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tf->hob_lbah = buf[10];
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tf->nsect = buf[12];
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tf->hob_nsect = buf[13];
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if (ata_id_has_ncq_autosense(dev->id))
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if (dev->class == ATA_DEV_ZAC && ata_id_has_ncq_autosense(dev->id))
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tf->auxiliary = buf[14] << 16 | buf[15] << 8 | buf[16];
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return 0;
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@ -1716,7 +1716,8 @@ void ata_eh_analyze_ncq_error(struct ata_link *link)
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memcpy(&qc->result_tf, &tf, sizeof(tf));
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qc->result_tf.flags = ATA_TFLAG_ISADDR | ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
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qc->err_mask |= AC_ERR_DEV | AC_ERR_NCQ;
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if ((qc->result_tf.command & ATA_SENSE) || qc->result_tf.auxiliary) {
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if (dev->class == ATA_DEV_ZAC &&
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((qc->result_tf.command & ATA_SENSE) || qc->result_tf.auxiliary)) {
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char sense_key, asc, ascq;
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sense_key = (qc->result_tf.auxiliary >> 16) & 0xff;
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@ -1770,10 +1771,11 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc,
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}
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switch (qc->dev->class) {
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case ATA_DEV_ATA:
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case ATA_DEV_ZAC:
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if (stat & ATA_SENSE)
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ata_eh_request_sense(qc, qc->scsicmd);
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/* fall through */
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case ATA_DEV_ATA:
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if (err & ATA_ICRC)
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qc->err_mask |= AC_ERR_ATA_BUS;
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if (err & (ATA_UNC | ATA_AMNF))
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@ -550,7 +550,6 @@ static int adma_port_start(struct ata_port *ap)
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(u32)pp->pkt_dma);
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return -ENOMEM;
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}
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memset(pp->pkt, 0, ADMA_PKT_BYTES);
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ap->private_data = pp;
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adma_reinit_engine(ap);
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return 0;
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@ -1136,7 +1136,6 @@ static int nv_adma_port_start(struct ata_port *ap)
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&mem_dma, GFP_KERNEL);
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if (!mem)
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return -ENOMEM;
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memset(mem, 0, NV_ADMA_PORT_PRIV_DMA_SZ);
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/*
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* First item in chunk of DMA memory:
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@ -1946,7 +1945,6 @@ static int nv_swncq_port_start(struct ata_port *ap)
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&pp->prd_dma, GFP_KERNEL);
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if (!pp->prd)
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return -ENOMEM;
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memset(pp->prd, 0, ATA_PRD_TBL_SZ * ATA_MAX_QUEUE);
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ap->private_data = pp;
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pp->sactive_block = ap->ioaddr.scr_addr + 4 * SCR_ACTIVE;
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@ -477,7 +477,6 @@ static int qs_port_start(struct ata_port *ap)
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GFP_KERNEL);
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if (!pp->pkt)
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return -ENOMEM;
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memset(pp->pkt, 0, QS_PKT_BYTES);
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ap->private_data = pp;
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qs_enter_reg_mode(ap);
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@ -1202,7 +1202,6 @@ static int sil24_port_start(struct ata_port *ap)
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cb = dmam_alloc_coherent(dev, cb_size, &cb_dma, GFP_KERNEL);
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if (!cb)
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return -ENOMEM;
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memset(cb, 0, cb_size);
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pp->cmd_block = cb;
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pp->cmd_block_dma = cb_dma;
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