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Merge branch 'mach_memory_h' of git://git.linaro.org/people/nico/linux into devel-stable

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This commit is contained in:
Russell King 2011-10-18 13:40:54 +01:00
commit cefd3e71ef
117 changed files with 347 additions and 1168 deletions
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46
arch/arm/Kconfig
View File

@ -196,7 +196,8 @@ config VECTORS_BASE
The base address of exception vectors.
config ARM_PATCH_PHYS_VIRT
bool "Patch physical to virtual translations at runtime"
bool "Patch physical to virtual translations at runtime" if EMBEDDED
default y
depends on !XIP_KERNEL && MMU
depends on !ARCH_REALVIEW || !SPARSEMEM
help
@ -205,16 +206,25 @@ config ARM_PATCH_PHYS_VIRT
kernel in system memory.
This can only be used with non-XIP MMU kernels where the base
of physical memory is at a 16MB boundary, or theoretically 64K
for the MSM machine class.
of physical memory is at a 16MB boundary.
config ARM_PATCH_PHYS_VIRT_16BIT
def_bool y
depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
Only disable this option if you know that you do not require
this feature (eg, building a kernel for a single machine) and
you need to shrink the kernel to the minimal size.
config NEED_MACH_MEMORY_H
bool
help
This option extends the physical to virtual translation patching
to allow physical memory down to a theoretical minimum of 64K
boundaries.
Select this when mach/memory.h is required to provide special
definitions for this platform. The need for mach/memory.h should
be avoided when possible.
config PHYS_OFFSET
hex "Physical address of main memory"
depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
help
Please provide the physical address corresponding to the
location of main memory in your system.
source "init/Kconfig"
@ -247,6 +257,7 @@ config ARCH_INTEGRATOR
select GENERIC_CLOCKEVENTS
select PLAT_VERSATILE
select PLAT_VERSATILE_FPGA_IRQ
select NEED_MACH_MEMORY_H
help
Support for ARM's Integrator platform.
@ -262,6 +273,7 @@ config ARCH_REALVIEW
select PLAT_VERSATILE_CLCD
select ARM_TIMER_SP804
select GPIO_PL061 if GPIOLIB
select NEED_MACH_MEMORY_H
help
This enables support for ARM Ltd RealView boards.
@ -302,7 +314,6 @@ config ARCH_AT91
select ARCH_REQUIRE_GPIOLIB
select HAVE_CLK
select CLKDEV_LOOKUP
select ARM_PATCH_PHYS_VIRT if MMU
help
This enables support for systems based on the Atmel AT91RM9200,
AT91SAM9 and AT91CAP9 processors.
@ -323,6 +334,7 @@ config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x-based"
select CPU_ARM720T
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help
Support for Cirrus Logic 711x/721x based boards.
@ -363,6 +375,7 @@ config ARCH_EBSA110
select ISA
select NO_IOPORT
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help
This is an evaluation board for the StrongARM processor available
from Digital. It has limited hardware on-board, including an
@ -378,6 +391,7 @@ config ARCH_EP93XX
select ARCH_REQUIRE_GPIOLIB
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_USES_GETTIMEOFFSET
select NEED_MEMORY_H
help
This enables support for the Cirrus EP93xx series of CPUs.
@ -386,6 +400,7 @@ config ARCH_FOOTBRIDGE
select CPU_SA110
select FOOTBRIDGE
select GENERIC_CLOCKEVENTS
select NEED_MACH_MEMORY_H
help
Support for systems based on the DC21285 companion chip
("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
@ -435,6 +450,7 @@ config ARCH_IOP13XX
select PCI
select ARCH_SUPPORTS_MSI
select VMSPLIT_1G
select NEED_MACH_MEMORY_H
help
Support for Intel's IOP13XX (XScale) family of processors.
@ -465,6 +481,7 @@ config ARCH_IXP23XX
select CPU_XSC3
select PCI
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help
Support for Intel's IXP23xx (XScale) family of processors.
@ -474,6 +491,7 @@ config ARCH_IXP2000
select CPU_XSCALE
select PCI
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help
Support for Intel's IXP2400/2800 (XScale) family of processors.
@ -567,6 +585,7 @@ config ARCH_KS8695
select CPU_ARM922T
select ARCH_REQUIRE_GPIOLIB
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help
Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
System-on-Chip devices.
@ -658,6 +677,7 @@ config ARCH_SHMOBILE
select SPARSE_IRQ
select MULTI_IRQ_HANDLER
select PM_GENERIC_DOMAINS if PM
select NEED_MACH_MEMORY_H
help
Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
@ -672,6 +692,7 @@ config ARCH_RPC
select NO_IOPORT
select ARCH_SPARSEMEM_ENABLE
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help
On the Acorn Risc-PC, Linux can support the internal IDE disk and
CD-ROM interface, serial and parallel port, and the floppy drive.
@ -690,6 +711,7 @@ config ARCH_SA1100
select HAVE_SCHED_CLOCK
select TICK_ONESHOT
select ARCH_REQUIRE_GPIOLIB
select NEED_MACH_MEMORY_H
help
Support for StrongARM 11x0 based boards.
@ -782,6 +804,7 @@ config ARCH_S5PV210
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_MEMORY_H
help
Samsung S5PV210/S5PC110 series based systems
@ -798,6 +821,7 @@ config ARCH_EXYNOS4
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select NEED_MACH_MEMORY_H
help
Samsung EXYNOS4 series based systems
@ -809,6 +833,7 @@ config ARCH_SHARK
select ZONE_DMA
select PCI
select ARCH_USES_GETTIMEOFFSET
select NEED_MACH_MEMORY_H
help
Support for the StrongARM based Digital DNARD machine, also known
as "Shark" (<http://www.shark-linux.de/shark.html>).
@ -836,6 +861,7 @@ config ARCH_U300
select CLKDEV_LOOKUP
select HAVE_MACH_CLKDEV
select GENERIC_GPIO
select NEED_MACH_MEMORY_H
help
Support for ST-Ericsson U300 series mobile platforms.

3
arch/arm/Makefile
View File

@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000
ifeq ($(CONFIG_ARCH_SA1100),y)
textofs-$(CONFIG_SA1111) := 0x00208000
endif
textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000
textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000
textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.

16
arch/arm/include/asm/memory.h
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@ -16,9 +16,12 @@
#include <linux/compiler.h>
#include <linux/const.h>
#include <linux/types.h>
#include <mach/memory.h>
#include <asm/sizes.h>
#ifdef CONFIG_NEED_MACH_MEMORY_H
#include <mach/memory.h>
#endif
/*
* Allow for constants defined here to be used from assembly code
* by prepending the UL suffix only with actual C code compilation.
@ -151,7 +154,6 @@
* so that all we need to do is modify the 8-bit constant field.
*/
#define __PV_BITS_31_24 0x81000000
#define __PV_BITS_23_16 0x00810000
extern unsigned long __pv_phys_offset;
#define PHYS_OFFSET __pv_phys_offset
@ -169,9 +171,6 @@ static inline unsigned long __virt_to_phys(unsigned long x)
{
unsigned long t;
__pv_stub(x, t, "add", __PV_BITS_31_24);
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
__pv_stub(t, t, "add", __PV_BITS_23_16);
#endif
return t;
}
@ -179,9 +178,6 @@ static inline unsigned long __phys_to_virt(unsigned long x)
{
unsigned long t;
__pv_stub(x, t, "sub", __PV_BITS_31_24);
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
__pv_stub(t, t, "sub", __PV_BITS_23_16);
#endif
return t;
}
#else
@ -191,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x)
#endif
#ifndef PHYS_OFFSET
#ifdef PLAT_PHYS_OFFSET
#define PHYS_OFFSET PLAT_PHYS_OFFSET
#else
#define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
#endif
#endif
/*

4
arch/arm/include/asm/module.h
View File

@ -31,11 +31,7 @@ struct mod_arch_specific {
/* Add __virt_to_phys patching state as well */
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
#define MODULE_ARCH_VERMAGIC_P2V "p2v16 "
#else
#define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
#endif
#else
#define MODULE_ARCH_VERMAGIC_P2V ""
#endif

4
arch/arm/kernel/debug.S
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@ -22,7 +22,7 @@
#if defined(CONFIG_DEBUG_ICEDCC)
@@ debug using ARM EmbeddedICE DCC channel
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
.endm
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)
@ -106,7 +106,7 @@
#ifdef CONFIG_MMU
.macro addruart_current, rx, tmp1, tmp2
addruart \tmp1, \tmp2
addruart \tmp1, \tmp2, \rx
mrc p15, 0, \rx, c1, c0
tst \rx, #1
moveq \rx, \tmp1

65
arch/arm/kernel/head.S
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@ -95,7 +95,7 @@ ENTRY(stext)
sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
add r8, r8, r4 @ PHYS_OFFSET
#else
ldr r8, =PLAT_PHYS_OFFSET
ldr r8, =PHYS_OFFSET @ always constant in this case
#endif
/*
@ -234,7 +234,7 @@ __create_page_tables:
* This allows debug messages to be output
* via a serial console before paging_init.
*/
addruart r7, r3
addruart r7, r3, r0
mov r3, r3, lsr #20
mov r3, r3, lsl #2
@ -488,13 +488,8 @@ __fixup_pv_table:
add r5, r5, r3 @ adjust table end address
add r7, r7, r3 @ adjust __pv_phys_offset address
str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset
#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
mov r6, r3, lsr #24 @ constant for add/sub instructions
teq r3, r6, lsl #24 @ must be 16MiB aligned
#else
mov r6, r3, lsr #16 @ constant for add/sub instructions
teq r3, r6, lsl #16 @ must be 64kiB aligned
#endif
THUMB( it ne @ cross section branch )
bne __error
str r6, [r7, #4] @ save to __pv_offset
@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table)
.text
__fixup_a_pv_table:
#ifdef CONFIG_THUMB2_KERNEL
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
lsls r0, r6, #24
lsr r6, #8
beq 1f
clz r7, r0
lsr r0, #24
lsl r0, r7
bic r0, 0x0080
lsrs r7, #1
orrcs r0, #0x0080
orr r0, r0, r7, lsl #12
#endif
1: lsls r6, #24
beq 4f
lsls r6, #24
beq 2f
clz r7, r6
lsr r6, #24
lsl r6, r7
@ -532,43 +515,25 @@ __fixup_a_pv_table:
orrcs r6, #0x0080
orr r6, r6, r7, lsl #12
orr r6, #0x4000
b 4f
2: @ at this point the C flag is always clear
add r7, r3
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
ldrh ip, [r7]
tst ip, 0x0400 @ the i bit tells us LS or MS byte
beq 3f
cmp r0, #0 @ set C flag, and ...
biceq ip, 0x0400 @ immediate zero value has a special encoding
streqh ip, [r7] @ that requires the i bit cleared
#endif
3: ldrh ip, [r7, #2]
b 2f
1: add r7, r3
ldrh ip, [r7, #2]
and ip, 0x8f00
orrcc ip, r6 @ mask in offset bits 31-24
orrcs ip, r0 @ mask in offset bits 23-16
orr ip, r6 @ mask in offset bits 31-24
strh ip, [r7, #2]
4: cmp r4, r5
2: cmp r4, r5
ldrcc r7, [r4], #4 @ use branch for delay slot
bcc 2b
bcc 1b
bx lr
#else
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
and r0, r6, #255 @ offset bits 23-16
mov r6, r6, lsr #8 @ offset bits 31-24
#else
mov r0, #0 @ just in case...
#endif
b 3f
2: ldr ip, [r7, r3]
b 2f
1: ldr ip, [r7, r3]
bic ip, ip, #0x000000ff
tst ip, #0x400 @ rotate shift tells us LS or MS byte
orrne ip, ip, r6 @ mask in offset bits 31-24
orreq ip, ip, r0 @ mask in offset bits 23-16
orr ip, ip, r6 @ mask in offset bits 31-24
str ip, [r7, r3]
3: cmp r4, r5
2: cmp r4, r5
ldrcc r7, [r4], #4 @ use branch for delay slot
bcc 2b
bcc 1b
mov pc, lr
#endif
ENDPROC(__fixup_a_pv_table)

2
arch/arm/mach-at91/include/mach/debug-macro.S
View File

@ -14,7 +14,7 @@
#include <mach/hardware.h>
#include <mach/at91_dbgu.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address)
ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address)
.endm

3
arch/arm/mach-bcmring/include/mach/hardware.h
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@ -22,7 +22,6 @@
#define __ASM_ARCH_HARDWARE_H
#include <asm/sizes.h>
#include <mach/memory.h>
#include <cfg_global.h>
#include <mach/csp/mm_io.h>
@ -31,7 +30,7 @@
* *_SIZE is the size of the region
* *_BASE is the virtual address
*/
#define RAM_START PLAT_PHYS_OFFSET
#define RAM_START PHYS_OFFSET
#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
#define RAM_BASE PAGE_OFFSET

28
arch/arm/mach-bcmring/include/mach/memory.h
View File

@ -1,28 +0,0 @@
/*****************************************************************************
* Copyright 2005 - 2008 Broadcom Corporation. All rights reserved.
*
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2, available at
* http://www.broadcom.com/licenses/GPLv2.php (the "GPL").
*
* Notwithstanding the above, under no circumstances may you combine this
* software in any way with any other Broadcom software provided under a
* license other than the GPL, without Broadcom's express prior written
* consent.
*****************************************************************************/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#include <cfg_global.h>
/*
* Physical vs virtual RAM address space conversion. These are
* private definitions which should NOT be used outside memory.h
* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
*/
#define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE
#endif

2
arch/arm/mach-clps711x/include/mach/debug-macro.S
View File

@ -14,7 +14,7 @@
#include <mach/hardware.h>
#include <asm/hardware/clps7111.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
#ifndef CONFIG_DEBUG_CLPS711X_UART2
mov \rp, #0x0000 @ UART1
#else

2
arch/arm/mach-cns3xxx/include/mach/debug-macro.S
View File

@ -10,7 +10,7 @@
* published by the Free Software Foundation.
*/
.macro addruart,rp,rv
.macro addruart,rp,rv,tmp
mov \rp, #0x00009000
orr \rv, \rp, #0xf0000000 @ virtual base
orr \rp, \rp, #0x10000000

26
arch/arm/mach-cns3xxx/include/mach/memory.h
View File

@ -1,26 +0,0 @@
/*
* Copyright 2003 ARM Limited
* Copyright 2008 Cavium Networks
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License, Version 2, as
* published by the Free Software Foundation.
*/
#ifndef __MACH_MEMORY_H
#define __MACH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define __phys_to_bus(x) ((x) + PHYS_OFFSET)
#define __bus_to_phys(x) ((x) - PHYS_OFFSET)
#define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v))
#define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b))
#define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p))
#define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b))
#endif

2
arch/arm/mach-davinci/cpuidle.c
View File

@ -19,7 +19,7 @@
#include <asm/proc-fns.h>
#include <mach/cpuidle.h>
#include <mach/memory.h>
#include <mach/ddr2.h>
#define DAVINCI_CPUIDLE_MAX_STATES 2

4
arch/arm/mach-davinci/include/mach/ddr2.h Normal file
View File

@ -0,0 +1,4 @@
#define DDR2_SDRCR_OFFSET 0xc
#define DDR2_SRPD_BIT (1 << 23)
#define DDR2_MCLKSTOPEN_BIT (1 << 30)
#define DDR2_LPMODEN_BIT (1 << 31)

52
arch/arm/mach-davinci/include/mach/debug-macro.S
View File

@ -18,56 +18,50 @@
#include <linux/serial_reg.h>
#include <asm/memory.h>
#include <mach/serial.h>
#define UART_SHIFT 2
#define davinci_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
#define davinci_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
.pushsection .data
davinci_uart_phys: .word 0
davinci_uart_virt: .word 0
.popsection
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
/* Use davinci_uart_phys/virt if already configured */
10: mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
ldreq \rp, =davinci_uart_v2p(davinci_uart_phys)
ldrne \rp, =davinci_uart_phys
add \rv, \rp, #4 @ davinci_uart_virt
ldr \rp, [\rp, #0]
ldr \rv, [\rv, #0]
10: adr \rp, 99f @ get effective addr of 99f
ldr \rv, [\rp] @ get absolute addr of 99f
sub \rv, \rv, \rp @ offset between the two
ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
sub \tmp, \rp, \rv @ make it effective
ldr \rp, [\tmp, #0] @ davinci_uart_phys
ldr \rv, [\tmp, #4] @ davinci_uart_virt
cmp \rp, #0 @ is port configured?
cmpne \rv, #0
bne 99f @ already configured
bne 100f @ already configured
/* Check the debug UART address set in uncompress.h */
mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
and \rp, pc, #0xff000000
ldr \rv, =DAVINCI_UART_INFO_OFS
add \rp, \rp, \rv
/* Copy uart phys address from decompressor uart info */
ldreq \rv, =davinci_uart_v2p(davinci_uart_phys)
ldrne \rv, =davinci_uart_phys
ldreq \rp, =DAVINCI_UART_INFO
ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
ldr \rp, [\rp, #0]
str \rp, [\rv]
ldr \rv, [\rp, #0]
str \rv, [\tmp, #0]
/* Copy uart virt address from decompressor uart info */
ldreq \rv, =davinci_uart_v2p(davinci_uart_virt)
ldrne \rv, =davinci_uart_virt
ldreq \rp, =DAVINCI_UART_INFO
ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO)
ldr \rp, [\rp, #4]
str \rp, [\rv]
ldr \rv, [\rp, #4]
str \rv, [\tmp, #4]
b 10b
99:
.align
99: .word .
.word davinci_uart_phys
.ltorg
100:
.endm
.macro senduart,rd,rx

39
arch/arm/mach-davinci/include/mach/memory.h
View File

@ -1,39 +0,0 @@
/*
* DaVinci memory space definitions
*
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/**************************************************************************
* Included Files
**************************************************************************/
#include <asm/page.h>
#include <asm/sizes.h>
/**************************************************************************
* Definitions
**************************************************************************/
#define DAVINCI_DDR_BASE 0x80000000
#define DA8XX_DDR_BASE 0xc0000000
#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
#error Cannot enable DaVinci and DA8XX platforms concurrently
#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE
#else
#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE
#endif
#define DDR2_SDRCR_OFFSET 0xc
#define DDR2_SRPD_BIT BIT(23)
#define DDR2_MCLKSTOPEN_BIT BIT(30)
#define DDR2_LPMODEN_BIT BIT(31)
#endif /* __ASM_ARCH_MEMORY_H */

3
arch/arm/mach-davinci/include/mach/serial.h
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@ -21,8 +21,9 @@
* macros in debug-macro.S.
*
* This area sits just below the page tables (see arch/arm/kernel/head.S).
* We define it as a relative offset from start of usable RAM.
*/
#define DAVINCI_UART_INFO (PLAT_PHYS_OFFSET + 0x3ff8)
#define DAVINCI_UART_INFO_OFS 0x3ff8
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)

7
arch/arm/mach-davinci/include/mach/uncompress.h
View File

@ -43,7 +43,12 @@ static inline void flush(void)
static inline void set_uart_info(u32 phys, void * __iomem virt)
{
u32 *uart_info = (u32 *)(DAVINCI_UART_INFO);
/*
* Get address of some.bss variable and round it down
* a la CONFIG_AUTO_ZRELADDR.
*/
u32 ram_start = (u32)&uart & 0xf8000000;
u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS);
uart = (u32 *)phys;
uart_info[0] = phys;

2
arch/arm/mach-davinci/sleep.S
View File

@ -22,7 +22,7 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <mach/psc.h>
#include <mach/memory.h>
#include <mach/ddr2.h>
#include "clock.h"

2
arch/arm/mach-dove/include/mach/debug-macro.S
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@ -8,7 +8,7 @@
#include <mach/bridge-regs.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =DOVE_SB_REGS_PHYS_BASE
ldr \rv, =DOVE_SB_REGS_VIRT_BASE
orr \rp, \rp, #0x00012000

10
arch/arm/mach-dove/include/mach/memory.h
View File

@ -1,10 +0,0 @@
/*
* arch/arm/mach-dove/include/mach/memory.h
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-ebsa110/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*
**/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0xf0000000
orr \rp, \rp, #0x00000be0
mov \rp, \rv

2
arch/arm/mach-ep93xx/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*/
#include <mach/ep93xx-regs.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base
ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base
orr \rp, \rp, #0x000c0000

2
arch/arm/mach-exynos4/include/mach/debug-macro.S
View File

@ -20,7 +20,7 @@
* aligned and add in the offset when we load the value here.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, = S3C_PA_UART
ldr \rv, = S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0

4
arch/arm/mach-footbridge/include/mach/debug-macro.S
View File

@ -15,7 +15,7 @@
#ifndef CONFIG_DEBUG_DC21285_PORT
/* For NetWinder debugging */
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x000003f8
orr \rv, \rp, #0xff000000 @ virtual
orr \rp, \rp, #0x7c000000 @ physical
@ -31,7 +31,7 @@
.equ dc21285_high, ARMCSR_BASE & 0xff000000
.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
.if dc21285_low
mov \rp, #dc21285_low
.else

2
arch/arm/mach-gemini/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*/
#include <mach/hardware.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =GEMINI_UART_BASE @ physical
ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual
.endm

19
arch/arm/mach-gemini/include/mach/memory.h
View File

@ -1,19 +0,0 @@
/*
* Copyright (C) 2001-2006 Storlink, Corp.
* Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __MACH_MEMORY_H
#define __MACH_MEMORY_H
#ifdef CONFIG_GEMINI_MEM_SWAP
# define PLAT_PHYS_OFFSET UL(0x00000000)
#else
# define PLAT_PHYS_OFFSET UL(0x10000000)
#endif
#endif /* __MACH_MEMORY_H */

2
arch/arm/mach-h720x/include/mach/debug-macro.S
View File

@ -16,7 +16,7 @@
.equ io_virt, IO_VIRT
.equ io_phys, IO_PHYS
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00020000 @ UART1
add \rv, \rp, #io_virt @ virtual address
add \rp, \rp, #io_phys @ physical base address

11
arch/arm/mach-h720x/include/mach/memory.h
View File

@ -1,11 +0,0 @@
/*
* arch/arm/mach-h720x/include/mach/memory.h
*
* Copyright (c) 2000 Jungjun Kim
*
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x40000000)
#endif

2
arch/arm/mach-integrator/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x16000000 @ physical base address
mov \rv, #0xf0000000 @ virtual base
add \rv, \rv, #0x16000000 >> 4

2
arch/arm/mach-iop13xx/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
* published by the Free Software Foundation.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00002300
orr \rp, \rp, #0x00000040
orr \rv, \rp, #0xfe000000 @ virtual

2
arch/arm/mach-iop32x/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
* published by the Free Software Foundation.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0xfe000000 @ physical as well as virtual
orr \rp, \rp, #0x00800000 @ location of the UART
mov \rv, \rp

13
arch/arm/mach-iop32x/include/mach/memory.h
View File

@ -1,13 +0,0 @@
/*
* arch/arm/mach-iop32x/include/mach/memory.h
*/
#ifndef __MEMORY_H
#define __MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0xa0000000)
#endif

2
arch/arm/mach-iop33x/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
* published by the Free Software Foundation.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00ff0000
orr \rp, \rp, #0x0000f700
orr \rv, #0xfe000000 @ virtual

13
arch/arm/mach-iop33x/include/mach/memory.h
View File

@ -1,13 +0,0 @@
/*
* arch/arm/mach-iop33x/include/mach/memory.h
*/
#ifndef __MEMORY_H
#define __MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-ixp2000/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00030000
#ifdef __ARMEB__
orr \rp, \rp, #0x00000003

2
arch/arm/mach-ixp23xx/include/mach/debug-macro.S
View File

@ -12,7 +12,7 @@
*/
#include <mach/ixp23xx.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical
ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual
#ifdef __ARMEB__

2
arch/arm/mach-ixp4xx/include/mach/debug-macro.S
View File

@ -10,7 +10,7 @@
* published by the Free Software Foundation.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
#ifdef __ARMEB__
mov \rp, #3 @ Uart regs are at off set of 3 if
@ byte writes used - Big Endian.

17
arch/arm/mach-ixp4xx/include/mach/memory.h
View File

@ -1,17 +0,0 @@
/*
* arch/arm/mach-ixp4xx/include/mach/memory.h
*
* Copyright (c) 2001-2004 MontaVista Software, Inc.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#include <asm/sizes.h>
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-kirkwood/include/mach/debug-macro.S
View File

@ -8,7 +8,7 @@
#include <mach/bridge-regs.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =KIRKWOOD_REGS_PHYS_BASE
ldr \rv, =KIRKWOOD_REGS_VIRT_BASE
orr \rp, \rp, #0x00012000

10
arch/arm/mach-kirkwood/include/mach/memory.h
View File

@ -1,10 +0,0 @@
/*
* arch/arm/mach-kirkwood/include/mach/memory.h
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-ks8695/include/mach/debug-macro.S
View File

@ -14,7 +14,7 @@
#include <mach/hardware.h>
#include <mach/regs-uart.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =KS8695_UART_PA @ physical base address
ldr \rv, =KS8695_UART_VA @ virtual base address
.endm

2
arch/arm/mach-l7200/include/mach/debug-macro.S
View File

@ -14,7 +14,7 @@
.equ io_virt, IO_BASE
.equ io_phys, IO_START
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00044000 @ UART1
@ mov \rp, #0x00045000 @ UART2
add \rv, \rp, #io_virt @ virtual address

2
arch/arm/mach-lpc32xx/include/mach/debug-macro.S
View File

@ -20,7 +20,7 @@
* Debug output is hardcoded to standard UART 5
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldreq \rp, =0x40090000
ldrne \rv, =0xF4090000
.endm

27
arch/arm/mach-lpc32xx/include/mach/memory.h
View File

@ -1,27 +0,0 @@
/*
* arch/arm/mach-lpc32xx/include/mach/memory.h
*
* Author: Kevin Wells <kevin.wells@nxp.com>
*
* Copyright (C) 2010 NXP Semiconductors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset of bank 0
*/
#define PLAT_PHYS_OFFSET UL(0x80000000)
#endif

2
arch/arm/mach-mmp/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
#include <mach/addr-map.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =APB_PHYS_BASE @ physical
ldr \rv, =APB_VIRT_BASE @ virtual
orr \rp, \rp, #0x00017000

14
arch/arm/mach-mmp/include/mach/memory.h
View File

@ -1,14 +0,0 @@
/*
* linux/arch/arm/mach-mmp/include/mach/memory.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_MACH_MEMORY_H
#define __ASM_MACH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif /* __ASM_MACH_MEMORY_H */

22
arch/arm/mach-msm/board-msm7x30.c
View File

@ -24,6 +24,7 @@
#include <linux/smsc911x.h>
#include <linux/usb/msm_hsusb.h>
#include <linux/clkdev.h>
#include <linux/memblock.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -42,6 +43,21 @@
extern struct sys_timer msm_timer;
static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag,
char **cmdline, struct meminfo *mi)
{
for (; tag->hdr.size; tag = tag_next(tag))
if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) {
tag->u.mem.start = 0;
tag->u.mem.size += SZ_2M;
}
}
static void __init msm7x30_reserve(void)
{
memblock_remove(0x0, SZ_2M);
}
static int hsusb_phy_init_seq[] = {
0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */
0x02, 0x36, /* Disable CDR Auto Reset feature */
@ -107,6 +123,8 @@ static void __init msm7x30_map_io(void)
MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
.atag_offset = 0x100,
.fixup = msm7x30_fixup,
.reserve = msm7x30_reserve,
.map_io = msm7x30_map_io,
.init_irq = msm7x30_init_irq,
.init_machine = msm7x30_init,
@ -115,6 +133,8 @@ MACHINE_END
MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
.atag_offset = 0x100,
.fixup = msm7x30_fixup,
.reserve = msm7x30_reserve,
.map_io = msm7x30_map_io,
.init_irq = msm7x30_init_irq,
.init_machine = msm7x30_init,
@ -123,6 +143,8 @@ MACHINE_END
MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
.atag_offset = 0x100,
.fixup = msm7x30_fixup,
.reserve = msm7x30_reserve,
.map_io = msm7x30_map_io,
.init_irq = msm7x30_init_irq,
.init_machine = msm7x30_init,

22
arch/arm/mach-msm/board-msm8960.c
View File

@ -20,16 +20,34 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/clkdev.h>
#include <linux/memblock.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
#include "devices.h"
static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag,
char **cmdline, struct meminfo *mi)
{
for (; tag->hdr.size; tag = tag_next(tag))
if (tag->hdr.tag == ATAG_MEM &&
tag->u.mem.start == 0x40200000) {
tag->u.mem.start = 0x40000000;
tag->u.mem.size += SZ_2M;
}
}
static void __init msm8960_reserve(void)
{
memblock_remove(0x40000000, SZ_2M);
}
static void __init msm8960_map_io(void)
{
msm_map_msm8960_io();
@ -76,6 +94,8 @@ static void __init msm8960_rumi3_init(void)
}
MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
.fixup = msm8960_fixup,
.reserve = msm8960_reserve,
.map_io = msm8960_map_io,
.init_irq = msm8960_init_irq,
.timer = &msm_timer,
@ -83,6 +103,8 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR")
MACHINE_END
MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3")
.fixup = msm8960_fixup,
.reserve = msm8960_reserve,
.map_io = msm8960_map_io,
.init_irq = msm8960_init_irq,
.timer = &msm_timer,

25
arch/arm/mach-msm/board-msm8x60.c
View File

@ -20,14 +20,31 @@
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/memblock.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
#include <asm/setup.h>
#include <mach/board.h>
#include <mach/msm_iomap.h>
static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag,
char **cmdline, struct meminfo *mi)
{
for (; tag->hdr.size; tag = tag_next(tag))
if (tag->hdr.tag == ATAG_MEM &&
tag->u.mem.start == 0x40200000) {
tag->u.mem.start = 0x40000000;
tag->u.mem.size += SZ_2M;
}
}
static void __init msm8x60_reserve(void)
{
memblock_remove(0x40000000, SZ_2M);
}
static void __init msm8x60_map_io(void)
{
@ -65,6 +82,8 @@ static void __init msm8x60_init(void)
}
MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
.fixup = msm8x60_fixup,
.reserve = msm8x60_reserve,
.map_io = msm8x60_map_io,
.init_irq = msm8x60_init_irq,
.init_machine = msm8x60_init,
@ -72,6 +91,8 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
MACHINE_END
MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
.fixup = msm8x60_fixup,
.reserve = msm8x60_reserve,
.map_io = msm8x60_map_io,
.init_irq = msm8x60_init_irq,
.init_machine = msm8x60_init,
@ -79,6 +100,8 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
MACHINE_END
MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
.fixup = msm8x60_fixup,
.reserve = msm8x60_reserve,
.map_io = msm8x60_map_io,
.init_irq = msm8x60_init_irq,
.init_machine = msm8x60_init,
@ -86,6 +109,8 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
MACHINE_END
MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
.fixup = msm8x60_fixup,
.reserve = msm8x60_reserve,
.map_io = msm8x60_map_io,
.init_irq = msm8x60_init_irq,
.init_machine = msm8x60_init,

4
arch/arm/mach-msm/include/mach/debug-macro.S
View File

@ -20,7 +20,7 @@
#include <mach/msm_iomap.h>
#if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE)
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =MSM_DEBUG_UART_PHYS
ldr \rv, =MSM_DEBUG_UART_BASE
.endm
@ -37,7 +37,7 @@
beq 1001b
.endm
#else
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rv, #0xff000000
orr \rv, \rv, #0x00f00000
.endm

35
arch/arm/mach-msm/include/mach/memory.h
View File

@ -1,35 +0,0 @@
/* arch/arm/mach-msm/include/mach/memory.h
*
* Copyright (C) 2007 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/* physical offset of RAM */
#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A)
#define PLAT_PHYS_OFFSET UL(0x00000000)
#elif defined(CONFIG_ARCH_QSD8X50)
#define PLAT_PHYS_OFFSET UL(0x20000000)
#elif defined(CONFIG_ARCH_MSM7X30)
#define PLAT_PHYS_OFFSET UL(0x00200000)
#elif defined(CONFIG_ARCH_MSM8X60)
#define PLAT_PHYS_OFFSET UL(0x40200000)
#elif defined(CONFIG_ARCH_MSM8960)
#define PLAT_PHYS_OFFSET UL(0x40200000)
#else
#define PLAT_PHYS_OFFSET UL(0x10000000)
#endif
#endif

2
arch/arm/mach-mv78xx0/include/mach/debug-macro.S
View File

@ -8,7 +8,7 @@
#include <mach/mv78xx0.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =MV78XX0_REGS_PHYS_BASE
ldr \rv, =MV78XX0_REGS_VIRT_BASE
orr \rp, \rp, #0x00012000

10
arch/arm/mach-mv78xx0/include/mach/memory.h
View File

@ -1,10 +0,0 @@
/*
* arch/arm/mach-mv78xx0/include/mach/memory.h
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-mxs/include/mach/debug-macro.S
View File

@ -30,7 +30,7 @@
#define UART_VADDR MXS_IO_ADDRESS(UART_PADDR)
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =UART_PADDR @ physical
ldr \rv, =UART_VADDR @ virtual
.endm

24
arch/arm/mach-mxs/include/mach/memory.h
View File

@ -1,24 +0,0 @@
/*
* Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifndef __MACH_MXS_MEMORY_H__
#define __MACH_MXS_MEMORY_H__
#define PHYS_OFFSET UL(0x40000000)
#endif /* __MACH_MXS_MEMORY_H__ */

2
arch/arm/mach-netx/include/mach/debug-macro.S
View File

@ -13,7 +13,7 @@
#include "hardware.h"
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00000a00
orr \rv, \rp, #io_p2v(0x00100000) @ virtual
orr \rp, \rp, #0x00100000 @ physical

26
arch/arm/mach-netx/include/mach/memory.h
View File

@ -1,26 +0,0 @@
/*
* arch/arm/mach-netx/include/mach/memory.h
*
* Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x80000000)
#endif

2
arch/arm/mach-nomadik/include/mach/debug-macro.S
View File

@ -10,7 +10,7 @@
*
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00100000
add \rp, \rp, #0x000fb000
add \rv, \rp, #0xf0000000 @ virtual base

28
arch/arm/mach-nomadik/include/mach/memory.h
View File

@ -1,28 +0,0 @@
/*
* mach-nomadik/include/mach/memory.h
*
* Copyright (C) 1999 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

21
arch/arm/mach-nuc93x/include/mach/memory.h
View File

@ -1,21 +0,0 @@
/*
* arch/arm/mach-nuc93x/include/mach/memory.h
*
* Copyright (c) 2008 Nuvoton technology corporation
* All rights reserved.
*
* Wan ZongShun <mcuos.com@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

48
arch/arm/mach-omap1/include/mach/debug-macro.S
View File

@ -13,13 +13,8 @@
#include <linux/serial_reg.h>
#include <asm/memory.h>
#include <plat/serial.h>
#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
.pushsection .data
omap_uart_phys: .word 0x0
omap_uart_virt: .word 0x0
@ -31,26 +26,24 @@ omap_uart_virt: .word 0x0
* the desired UART phys and virt addresses temporarily into
* the omap_uart_phys and omap_uart_virt above.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
/* Use omap_uart_phys/virt if already configured */
9: mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
ldrne \rp, =omap_uart_phys @ MMU enabled
add \rv, \rp, #4 @ omap_uart_virt
ldr \rp, [\rp, #0]
ldr \rv, [\rv, #0]
9: adr \rp, 99f @ get effective addr of 99f
ldr \rv, [\rp] @ get absolute addr of 99f
sub \rv, \rv, \rp @ offset between the two
ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
sub \tmp, \rp, \rv @ make it effective
ldr \rp, [\tmp, #0] @ omap_uart_phys
ldr \rv, [\tmp, #4] @ omap_uart_virt
cmp \rp, #0 @ is port configured?
cmpne \rv, #0
bne 99f @ already configured
bne 100f @ already configured
/* Check the debug UART configuration set in uncompress.h */
mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled
ldr \rp, [\rp, #0]
and \rp, pc, #0xff000000
ldr \rv, =OMAP_UART_INFO_OFS
ldr \rp, [\rp, \rv]
/* Select the UART to use based on the UART1 scratchpad value */
10: cmp \rp, #0 @ no port configured?
@ -74,17 +67,18 @@ omap_uart_virt: .word 0x0
/* Store both phys and virt address for the uart */
98: add \rp, \rp, #0xff000000 @ phys base
mrc p15, 0, \rv, c1, c0
tst \rv, #1 @ MMU enabled?
ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
ldrne \rv, =omap_uart_phys @ MMU enabled
str \rp, [\rv, #0]
str \rp, [\tmp, #0] @ omap_uart_phys
sub \rp, \rp, #0xff000000 @ phys base
add \rp, \rp, #0xfe000000 @ virt base
add \rv, \rv, #4 @ omap_uart_lsr
str \rp, [\rv, #0]
str \rp, [\tmp, #4] @ omap_uart_virt
b 9b
99:
.align
99: .word .
.word omap_uart_phys
.ltorg
100:
.endm
.macro senduart,rd,rx

53
arch/arm/mach-omap1/include/mach/memory.h
View File

@ -2,4 +2,55 @@
* arch/arm/mach-omap1/include/mach/memory.h
*/
#include <plat/memory.h>
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x10000000)
/*
* Bus address is physical address, except for OMAP-1510 Local Bus.
* OMAP-1510 bus address is translated into a Local Bus address if the
* OMAP bus type is lbus. We do the address translation based on the
* device overriding the defaults used in the dma-mapping API.
* Note that the is_lbus_device() test is not very efficient on 1510
* because of the strncmp().
*/
#ifdef CONFIG_ARCH_OMAP15XX
/*
* OMAP-1510 Local Bus address offset
*/
#define OMAP1510_LB_OFFSET UL(0x30000000)
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0))
#define __arch_pfn_to_dma(dev, pfn) \
({ dma_addr_t __dma = __pfn_to_phys(pfn); \
if (is_lbus_device(dev)) \
__dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \
__dma; })
#define __arch_dma_to_pfn(dev, addr) \
({ dma_addr_t __dma = addr; \
if (is_lbus_device(dev)) \
__dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \
__phys_to_pfn(__dma); \
})
#define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \
lbus_to_virt(addr) : \
__phys_to_virt(addr)); })
#define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \
(dma_addr_t) (is_lbus_device(dev) ? \
virt_to_lbus(__addr) : \
__virt_to_phys(__addr)); })
#endif /* CONFIG_ARCH_OMAP15XX */
#endif

81
arch/arm/mach-omap2/include/mach/debug-macro.S
View File

@ -13,15 +13,10 @@
#include <linux/serial_reg.h>
#include <asm/memory.h>
#include <plat/serial.h>
#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
.pushsection .data
omap_uart_phys: .word 0
omap_uart_virt: .word 0
@ -34,26 +29,25 @@ omap_uart_lsr: .word 0
* the desired UART phys and virt addresses temporarily into
* the omap_uart_phys and omap_uart_virt above.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
/* Use omap_uart_phys/virt if already configured */
10: mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
ldrne \rp, =omap_uart_phys @ MMU enabled
add \rv, \rp, #4 @ omap_uart_virt
ldr \rp, [\rp, #0]
ldr \rv, [\rv, #0]
10: adr \rp, 99f @ get effective addr of 99f
ldr \rv, [\rp] @ get absolute addr of 99f
sub \rv, \rv, \rp @ offset between the two
ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
sub \tmp, \rp, \rv @ make it effective
ldr \rp, [\tmp, #0] @ omap_uart_phys
ldr \rv, [\tmp, #4] @ omap_uart_virt
cmp \rp, #0 @ is port configured?
cmpne \rv, #0
bne 99f @ already configured
bne 100f @ already configured
/* Check the debug UART configuration set in uncompress.h */
mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled
ldr \rp, [\rp, #0]
mov \rp, pc
ldr \rv, =OMAP_UART_INFO_OFS
and \rp, \rp, #0xff000000
ldr \rp, [\rp, \rv]
/* Select the UART to use based on the UART1 scratchpad value */
cmp \rp, #0 @ no port configured?
@ -106,50 +100,47 @@ omap_uart_lsr: .word 0
b 98f
83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE)
b 98f
95: ldr \rp, =ZOOM_UART_BASE
mrc p15, 0, \rv, c1, c0
tst \rv, #1 @ MMU enabled?
ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
ldrne \rv, =omap_uart_phys @ MMU enabled
str \rp, [\rv, #0]
str \rp, [\tmp, #0] @ omap_uart_phys
ldr \rp, =ZOOM_UART_VIRT
add \rv, \rv, #4 @ omap_uart_virt
str \rp, [\rv, #0]
str \rp, [\tmp, #4] @ omap_uart_virt
mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT)
add \rv, \rv, #4 @ omap_uart_lsr
str \rp, [\rv, #0]
str \rp, [\tmp, #8] @ omap_uart_lsr
b 10b
/* Store both phys and virt address for the uart */
98: add \rp, \rp, #0x48000000 @ phys base
mrc p15, 0, \rv, c1, c0
tst \rv, #1 @ MMU enabled?
ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
ldrne \rv, =omap_uart_phys @ MMU enabled
str \rp, [\rv, #0]
str \rp, [\tmp, #0] @ omap_uart_phys
sub \rp, \rp, #0x48000000 @ phys base
add \rp, \rp, #0xfa000000 @ virt base
add \rv, \rv, #4 @ omap_uart_virt
str \rp, [\rv, #0]
str \rp, [\tmp, #4] @ omap_uart_virt
mov \rp, #(UART_LSR << OMAP_PORT_SHIFT)
add \rv, \rv, #4 @ omap_uart_lsr
str \rp, [\rv, #0]
str \rp, [\tmp, #8] @ omap_uart_lsr
b 10b
99:
.align
99: .word .
.word omap_uart_phys
.ltorg
100: /* Pass the UART_LSR reg address */
ldr \tmp, [\tmp, #8] @ omap_uart_lsr
add \rp, \rp, \tmp
add \rv, \rv, \tmp
.endm
.macro senduart,rd,rx
strb \rd, [\rx]
orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset
bic \rx, \rx, #0xff @ get base (THR) reg address
strb \rd, [\rx] @ send lower byte of rd
orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR)
bic \rd, \rd, #(0xff << 24) @ restore original rd
.endm
.macro busyuart,rd,rx
1001: mrc p15, 0, \rd, c1, c0
tst \rd, #1 @ MMU enabled?
ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled
ldrne \rd, =omap_uart_lsr @ MMU enabled
ldr \rd, [\rd, #0]
ldrb \rd, [\rx, \rd]
1001: ldrb \rd, [\rx] @ rx contains UART_LSR address
and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
bne 1001b

5
arch/arm/mach-omap2/include/mach/memory.h
View File

@ -1,5 +0,0 @@
/*
* arch/arm/mach-omap2/include/mach/memory.h
*/
#include <plat/memory.h>

2
arch/arm/mach-orion5x/include/mach/debug-macro.S
View File

@ -10,7 +10,7 @@
#include <mach/orion5x.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =ORION5X_REGS_PHYS_BASE
ldr \rv, =ORION5X_REGS_VIRT_BASE
orr \rp, \rp, #0x00012000

12
arch/arm/mach-orion5x/include/mach/memory.h
View File

@ -1,12 +0,0 @@
/*
* arch/arm/mach-orion5x/include/mach/memory.h
*
* Marvell Orion memory definitions
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-pnx4008/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00090000
add \rv, \rp, #0xf4000000 @ virtual
add \rp, \rp, #0x40000000 @ physical

21
arch/arm/mach-pnx4008/include/mach/memory.h
View File

@ -1,21 +0,0 @@
/*
* arch/arm/mach-pnx4008/include/mach/memory.h
*
* Copyright (c) 2005 Philips Semiconductors
* Copyright (c) 2005 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x80000000)
#endif

2
arch/arm/mach-prima2/include/mach/debug-macro.S
View File

@ -9,7 +9,7 @@
#include <mach/hardware.h>
#include <mach/uart.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical
ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual
.endm

21
arch/arm/mach-prima2/include/mach/memory.h
View File

@ -1,21 +0,0 @@
/*
* arch/arm/mach-prima2/include/mach/memory.h
*
* Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x00000000)
/*
* Restrict DMA-able region to workaround silicon limitation.
* The limitation restricts buffers available for DMA to SD/MMC
* hardware to be below 256MB
*/
#define ARM_DMA_ZONE_SIZE (SZ_256M)
#endif

5
arch/arm/mach-prima2/l2x0.c
View File

@ -13,7 +13,6 @@
#include <linux/of.h>
#include <linux/of_address.h>
#include <asm/hardware/cache-l2x0.h>
#include <mach/memory.h>
#define L2X0_ADDR_FILTERING_START 0xC00
#define L2X0_ADDR_FILTERING_END 0xC04
@ -41,9 +40,9 @@ static int __init sirfsoc_of_l2x_init(void)
/*
* set the physical memory windows L2 cache will cover
*/
writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024,
writel_relaxed(PHYS_OFFSET + 1024 * 1024 * 1024,
sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END);
writel_relaxed(PLAT_PHYS_OFFSET | 0x1,
writel_relaxed(PHYS_OFFSET | 0x1,
sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START);
writel_relaxed(0,

1
arch/arm/mach-prima2/prima2.c
View File

@ -36,6 +36,7 @@ MACHINE_START(PRIMA2_EVB, "prima2cb")
.map_io = sirfsoc_map_lluart,
.init_irq = sirfsoc_of_irq_init,
.timer = &sirfsoc_timer,
.dma_zone_size = SZ_256M,
.init_machine = sirfsoc_mach_init,
.dt_compat = prima2cb_dt_match,
MACHINE_END

2
arch/arm/mach-pxa/include/mach/debug-macro.S
View File

@ -13,7 +13,7 @@
#include "hardware.h"
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00100000
orr \rv, \rp, #io_p2v(0x40000000) @ virtual
orr \rp, \rp, #0x40000000 @ physical

20
arch/arm/mach-pxa/include/mach/memory.h
View File

@ -1,20 +0,0 @@
/*
* arch/arm/mach-pxa/include/mach/memory.h
*
* Author: Nicolas Pitre
* Copyright: (C) 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0xa0000000)
#endif

2
arch/arm/mach-pxa/z2.c
View File

@ -686,7 +686,7 @@ static void z2_power_off(void)
*/
PSPR = 0x0;
local_irq_disable();
pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET);
pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PHYS_OFFSET - PAGE_OFFSET);
}
#else
#define z2_power_off NULL

2
arch/arm/mach-realview/include/mach/debug-macro.S
View File

@ -33,7 +33,7 @@
#error "Unknown RealView platform"
#endif
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #DEBUG_LL_UART_OFFSET
orr \rv, \rp, #0xfb000000 @ virtual base
orr \rp, \rp, #0x10000000 @ physical base

2
arch/arm/mach-rpc/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x00010000
orr \rp, \rp, #0x00000fe0
orr \rv, \rp, #0xe0000000 @ virtual

20
arch/arm/mach-s3c2400/include/mach/memory.h
View File

@ -1,20 +0,0 @@
/* arch/arm/mach-s3c2400/include/mach/memory.h
* from arch/arm/mach-rpc/include/mach/memory.h
*
* Copyright 2007 Simtec Electronics
* http://armlinux.simtec.co.uk/
* Ben Dooks <ben@simtec.co.uk>
*
* Copyright (C) 1996,1997,1998 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x0C000000)
#endif

2
arch/arm/mach-s3c2410/include/mach/debug-macro.S
View File

@ -19,7 +19,7 @@
#define S3C2410_UART1_OFF (0x4000)
#define SHIFT_2440TXF (14-9)
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, = S3C24XX_PA_UART
ldr \rv, = S3C24XX_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0

16
arch/arm/mach-s3c2410/include/mach/memory.h
View File

@ -1,16 +0,0 @@
/* arch/arm/mach-s3c2410/include/mach/memory.h
* from arch/arm/mach-rpc/include/mach/memory.h
*
* Copyright (C) 1996,1997,1998 Russell King.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x30000000)
#endif

2
arch/arm/mach-s3c64xx/include/mach/debug-macro.S
View File

@ -21,7 +21,7 @@
* aligned and add in the offset when we load the value here.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, = S3C_PA_UART
ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
#if CONFIG_DEBUG_S3C_UART != 0

18
arch/arm/mach-s3c64xx/include/mach/memory.h
View File

@ -1,18 +0,0 @@
/* arch/arm/mach-s3c6400/include/mach/memory.h
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x50000000)
#endif

2
arch/arm/mach-s5p64x0/include/mach/debug-macro.S
View File

@ -15,7 +15,7 @@
#include <plat/regs-serial.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0xE0000000
orr \rp, \rp, #0x00100000
ldr \rp, [\rp, #0x118 ]

18
arch/arm/mach-s5p64x0/include/mach/memory.h
View File

@ -1,18 +0,0 @@
/* linux/arch/arm/mach-s5p64x0/include/mach/memory.h
*
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* S5P64X0 - Memory definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H __FILE__
#define PLAT_PHYS_OFFSET UL(0x20000000)
#endif /* __ASM_ARCH_MEMORY_H */

2
arch/arm/mach-s5pc100/include/mach/debug-macro.S
View File

@ -22,7 +22,7 @@
* aligned and add in the offset when we load the value here.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, = S3C_PA_UART
ldr \rv, = S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0

18
arch/arm/mach-s5pc100/include/mach/memory.h
View File

@ -1,18 +0,0 @@
/* arch/arm/mach-s5pc100/include/mach/memory.h
*
* Copyright 2008 Samsung Electronics Co.
* Byungho Min <bhmin@samsung.com>
*
* Based on mach-s3c6400/include/mach/memory.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
#define PLAT_PHYS_OFFSET UL(0x20000000)
#endif

2
arch/arm/mach-s5pv210/include/mach/debug-macro.S
View File

@ -21,7 +21,7 @@
* aligned and add in the offset when we load the value here.
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, = S3C_PA_UART
ldr \rv, = S3C_VA_UART
#if CONFIG_DEBUG_S3C_UART != 0

2
arch/arm/mach-sa1100/include/mach/debug-macro.S
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@ -12,7 +12,7 @@
*/
#include <mach/hardware.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
moveq \rp, #0x80000000 @ physical base address

2
arch/arm/mach-shark/include/mach/debug-macro.S
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@ -11,7 +11,7 @@
*
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0xe0000000
orr \rp, \rp, #0x000003f8
mov \rv, \rp

19
arch/arm/mach-spear3xx/include/mach/memory.h
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@ -1,19 +0,0 @@
/*
* arch/arm/mach-spear3xx/include/mach/memory.h
*
* Memory map for SPEAr3xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Viresh Kumar<viresh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_MEMORY_H
#define __MACH_MEMORY_H
#include <plat/memory.h>
#endif /* __MACH_MEMORY_H */

19
arch/arm/mach-spear6xx/include/mach/memory.h
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@ -1,19 +0,0 @@
/*
* arch/arm/mach-spear6xx/include/mach/memory.h
*
* Memory map for SPEAr6xx machine family
*
* Copyright (C) 2009 ST Microelectronics
* Rajeev Kumar<rajeev-dlh.kumar@st.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#ifndef __MACH_MEMORY_H
#define __MACH_MEMORY_H
#include <plat/memory.h>
#endif /* __MACH_MEMORY_H */

2
arch/arm/mach-tegra/include/mach/debug-macro.S
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@ -21,7 +21,7 @@
#include <mach/io.h>
#include <mach/iomap.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =IO_APB_PHYS @ physical
ldr \rv, =IO_APB_VIRT @ virtual
orr \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF)

28
arch/arm/mach-tegra/include/mach/memory.h
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@ -1,28 +0,0 @@
/*
* arch/arm/mach-tegra/include/mach/memory.h
*
* Copyright (C) 2010 Google, Inc.
*
* Author:
* Colin Cross <ccross@google.com>
* Erik Gilling <konkers@google.com>
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MACH_TEGRA_MEMORY_H
#define __MACH_TEGRA_MEMORY_H
/* physical offset of RAM */
#define PLAT_PHYS_OFFSET UL(0)
#endif

2
arch/arm/mach-u300/include/mach/debug-macro.S
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@ -10,7 +10,7 @@
*/
#include <mach/hardware.h>
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
/* If we move the address using MMU, use this. */
ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address
ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address

2
arch/arm/mach-ux500/include/mach/debug-macro.S
View File

@ -35,7 +35,7 @@
#define UX500_UART(n) __UX500_UART(n)
#define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART)
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
ldr \rp, =UART_BASE @ no, physical address
ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address
.endm

18
arch/arm/mach-ux500/include/mach/memory.h
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@ -1,18 +0,0 @@
/*
* Copyright (C) 2009 ST-Ericsson
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#define BUS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-versatile/include/mach/debug-macro.S
View File

@ -11,7 +11,7 @@
*
*/
.macro addruart, rp, rv
.macro addruart, rp, rv, tmp
mov \rp, #0x001F0000
orr \rp, \rp, #0x00001000
orr \rv, \rp, #0xf1000000 @ virtual base

28
arch/arm/mach-versatile/include/mach/memory.h
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@ -1,28 +0,0 @@
/*
* arch/arm/mach-versatile/include/mach/memory.h
*
* Copyright (C) 2003 ARM Limited
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PLAT_PHYS_OFFSET UL(0x00000000)
#endif

2
arch/arm/mach-vexpress/include/mach/debug-macro.S
View File

@ -12,7 +12,7 @@
#define DEBUG_LL_UART_OFFSET 0x00009000
.macro addruart,rp,rv
.macro addruart,rp,rv,tmp
mov \rp, #DEBUG_LL_UART_OFFSET
orr \rv, \rp, #0xf8000000 @ virtual base
orr \rp, \rp, #0x10000000 @ physical base

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