forked from luck/tmp_suning_uos_patched
MIPS: Use common FP sigcontext code for O32 compat
Make use of the common FP sigcontext code for O32 binaries running on MIPS64 kernels now that it is taking appropriate offsets into struct sigcontext(32) from struct mips_abi. [ralf@linux-mips.org: Fixed reject.] Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: James Hogan <james.hogan@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Maciej W. Rozycki <macro@codesourcery.com> Patchwork: https://patchwork.linux-mips.org/patch/10792/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -23,4 +23,7 @@
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#define __ARCH_HAS_IRIX_SIGACTION
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extern int protected_save_fp_context(void __user *sc);
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extern int protected_restore_fp_context(void __user *sc);
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#endif /* _ASM_SIGNAL_H */
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@ -245,17 +245,6 @@ void output_sc_defines(void)
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}
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#endif
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#ifdef CONFIG_MIPS32_COMPAT
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void output_sc32_defines(void)
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{
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COMMENT("Linux 32-bit sigcontext offsets.");
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OFFSET(SC32_FPREGS, sigcontext32, sc_fpregs);
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OFFSET(SC32_FPC_CSR, sigcontext32, sc_fpc_csr);
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OFFSET(SC32_FPC_EIR, sigcontext32, sc_fpc_eir);
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BLANK();
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}
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#endif
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void output_signal_defined(void)
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{
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COMMENT("Linux signal numbers.");
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@ -107,66 +107,6 @@ LEAF(_save_fp_context)
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.set pop
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END(_save_fp_context)
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#ifdef CONFIG_MIPS32_COMPAT
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/* Save 32-bit process floating point context */
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LEAF(_save_fp_context32)
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.set push
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.set MIPS_ISA_ARCH_LEVEL_RAW
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SET_HARDFLOAT
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cfc1 t1, fcr31
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#ifndef CONFIG_CPU_MIPS64_R6
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mfc0 t0, CP0_STATUS
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sll t0, t0, 5
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bgez t0, 1f # skip storing odd if FR=0
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nop
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#endif
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/* Store the 16 odd double precision registers */
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EX sdc1 $f1, SC32_FPREGS+8(a0)
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EX sdc1 $f3, SC32_FPREGS+24(a0)
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EX sdc1 $f5, SC32_FPREGS+40(a0)
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EX sdc1 $f7, SC32_FPREGS+56(a0)
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EX sdc1 $f9, SC32_FPREGS+72(a0)
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EX sdc1 $f11, SC32_FPREGS+88(a0)
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EX sdc1 $f13, SC32_FPREGS+104(a0)
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EX sdc1 $f15, SC32_FPREGS+120(a0)
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EX sdc1 $f17, SC32_FPREGS+136(a0)
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EX sdc1 $f19, SC32_FPREGS+152(a0)
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EX sdc1 $f21, SC32_FPREGS+168(a0)
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EX sdc1 $f23, SC32_FPREGS+184(a0)
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EX sdc1 $f25, SC32_FPREGS+200(a0)
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EX sdc1 $f27, SC32_FPREGS+216(a0)
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EX sdc1 $f29, SC32_FPREGS+232(a0)
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EX sdc1 $f31, SC32_FPREGS+248(a0)
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/* Store the 16 even double precision registers */
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1: EX sdc1 $f0, SC32_FPREGS+0(a0)
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EX sdc1 $f2, SC32_FPREGS+16(a0)
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EX sdc1 $f4, SC32_FPREGS+32(a0)
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EX sdc1 $f6, SC32_FPREGS+48(a0)
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EX sdc1 $f8, SC32_FPREGS+64(a0)
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EX sdc1 $f10, SC32_FPREGS+80(a0)
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EX sdc1 $f12, SC32_FPREGS+96(a0)
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EX sdc1 $f14, SC32_FPREGS+112(a0)
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EX sdc1 $f16, SC32_FPREGS+128(a0)
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EX sdc1 $f18, SC32_FPREGS+144(a0)
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EX sdc1 $f20, SC32_FPREGS+160(a0)
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EX sdc1 $f22, SC32_FPREGS+176(a0)
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EX sdc1 $f24, SC32_FPREGS+192(a0)
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EX sdc1 $f26, SC32_FPREGS+208(a0)
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EX sdc1 $f28, SC32_FPREGS+224(a0)
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EX sdc1 $f30, SC32_FPREGS+240(a0)
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EX sw t1, SC32_FPC_CSR(a0)
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cfc1 t0, $0 # implementation/version
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EX sw t0, SC32_FPC_EIR(a0)
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.set pop
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jr ra
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li v0, 0 # success
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END(_save_fp_context32)
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#endif
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/**
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* _restore_fp_context() - restore FP context to the FPU
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* @a0 - pointer to fpregs field of sigcontext
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li v0, 0 # success
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END(_restore_fp_context)
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#ifdef CONFIG_MIPS32_COMPAT
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LEAF(_restore_fp_context32)
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/* Restore an o32 sigcontext. */
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.set push
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SET_HARDFLOAT
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EX lw t1, SC32_FPC_CSR(a0)
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#ifndef CONFIG_CPU_MIPS64_R6
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mfc0 t0, CP0_STATUS
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sll t0, t0, 5
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bgez t0, 1f # skip loading odd if FR=0
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nop
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#endif
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EX ldc1 $f1, SC32_FPREGS+8(a0)
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EX ldc1 $f3, SC32_FPREGS+24(a0)
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EX ldc1 $f5, SC32_FPREGS+40(a0)
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EX ldc1 $f7, SC32_FPREGS+56(a0)
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EX ldc1 $f9, SC32_FPREGS+72(a0)
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EX ldc1 $f11, SC32_FPREGS+88(a0)
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EX ldc1 $f13, SC32_FPREGS+104(a0)
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EX ldc1 $f15, SC32_FPREGS+120(a0)
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EX ldc1 $f17, SC32_FPREGS+136(a0)
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EX ldc1 $f19, SC32_FPREGS+152(a0)
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EX ldc1 $f21, SC32_FPREGS+168(a0)
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EX ldc1 $f23, SC32_FPREGS+184(a0)
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EX ldc1 $f25, SC32_FPREGS+200(a0)
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EX ldc1 $f27, SC32_FPREGS+216(a0)
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EX ldc1 $f29, SC32_FPREGS+232(a0)
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EX ldc1 $f31, SC32_FPREGS+248(a0)
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1: EX ldc1 $f0, SC32_FPREGS+0(a0)
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EX ldc1 $f2, SC32_FPREGS+16(a0)
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EX ldc1 $f4, SC32_FPREGS+32(a0)
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EX ldc1 $f6, SC32_FPREGS+48(a0)
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EX ldc1 $f8, SC32_FPREGS+64(a0)
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EX ldc1 $f10, SC32_FPREGS+80(a0)
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EX ldc1 $f12, SC32_FPREGS+96(a0)
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EX ldc1 $f14, SC32_FPREGS+112(a0)
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EX ldc1 $f16, SC32_FPREGS+128(a0)
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EX ldc1 $f18, SC32_FPREGS+144(a0)
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EX ldc1 $f20, SC32_FPREGS+160(a0)
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EX ldc1 $f22, SC32_FPREGS+176(a0)
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EX ldc1 $f24, SC32_FPREGS+192(a0)
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EX ldc1 $f26, SC32_FPREGS+208(a0)
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EX ldc1 $f28, SC32_FPREGS+224(a0)
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EX ldc1 $f30, SC32_FPREGS+240(a0)
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ctc1 t1, fcr31
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jr ra
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li v0, 0 # success
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.set pop
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END(_restore_fp_context32)
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#endif
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#ifdef CONFIG_CPU_HAS_MSA
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.macro op_one_wr op, idx, base
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@ -124,7 +124,7 @@ static int restore_hw_fp_context(void __user *sc)
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/*
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* Helper routines
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*/
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static int protected_save_fp_context(void __user *sc)
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int protected_save_fp_context(void __user *sc)
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{
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struct mips_abi *abi = current->thread.abi;
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uint64_t __user *fpregs = sc + abi->off_sc_fpregs;
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return err;
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}
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static int protected_restore_fp_context(void __user *sc)
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int protected_restore_fp_context(void __user *sc)
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{
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struct mips_abi *abi = current->thread.abi;
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uint64_t __user *fpregs = sc + abi->off_sc_fpregs;
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@ -36,12 +36,6 @@
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#include "signal-common.h"
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static int (*save_fp_context32)(struct sigcontext32 __user *sc);
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static int (*restore_fp_context32)(struct sigcontext32 __user *sc);
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extern asmlinkage int _save_fp_context32(struct sigcontext32 __user *sc);
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extern asmlinkage int _restore_fp_context32(struct sigcontext32 __user *sc);
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/*
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* Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
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*/
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struct ucontext32 rs_uc;
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};
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/*
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* Thread saved context copy to/from a signal context presumed to be on the
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* user stack, and therefore accessed with appropriate macros from uaccess.h.
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*/
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static int copy_fp_to_sigcontext32(struct sigcontext32 __user *sc)
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{
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int i;
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int err = 0;
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int inc = test_thread_flag(TIF_32BIT_FPREGS) ? 2 : 1;
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for (i = 0; i < NUM_FPU_REGS; i += inc) {
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err |=
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__put_user(get_fpr64(¤t->thread.fpu.fpr[i], 0),
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&sc->sc_fpregs[i]);
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}
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err |= __put_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
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return err;
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}
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static int copy_fp_from_sigcontext32(struct sigcontext32 __user *sc)
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{
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int i;
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int err = 0;
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int inc = test_thread_flag(TIF_32BIT_FPREGS) ? 2 : 1;
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u64 fpr_val;
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for (i = 0; i < NUM_FPU_REGS; i += inc) {
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err |= __get_user(fpr_val, &sc->sc_fpregs[i]);
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set_fpr64(¤t->thread.fpu.fpr[i], 0, fpr_val);
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}
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err |= __get_user(current->thread.fpu.fcr31, &sc->sc_fpc_csr);
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return err;
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}
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/*
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* sigcontext handlers
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*/
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static int protected_save_fp_context32(struct sigcontext32 __user *sc)
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{
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int err;
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while (1) {
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lock_fpu_owner();
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if (is_fpu_owner()) {
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err = save_fp_context32(sc);
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unlock_fpu_owner();
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} else {
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unlock_fpu_owner();
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err = copy_fp_to_sigcontext32(sc);
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}
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if (likely(!err))
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break;
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/* touch the sigcontext and try again */
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err = __put_user(0, &sc->sc_fpregs[0]) |
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__put_user(0, &sc->sc_fpregs[31]) |
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__put_user(0, &sc->sc_fpc_csr);
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if (err)
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break; /* really bad sigcontext */
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}
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return err;
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}
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static int protected_restore_fp_context32(struct sigcontext32 __user *sc)
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{
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int err, tmp __maybe_unused;
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while (1) {
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lock_fpu_owner();
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if (is_fpu_owner()) {
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err = restore_fp_context32(sc);
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unlock_fpu_owner();
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} else {
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unlock_fpu_owner();
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err = copy_fp_from_sigcontext32(sc);
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}
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if (likely(!err))
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break;
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/* touch the sigcontext and try again */
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err = __get_user(tmp, &sc->sc_fpregs[0]) |
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__get_user(tmp, &sc->sc_fpregs[31]) |
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__get_user(tmp, &sc->sc_fpc_csr);
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if (err)
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break; /* really bad sigcontext */
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}
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return err;
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}
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static int setup_sigcontext32(struct pt_regs *regs,
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struct sigcontext32 __user *sc)
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{
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int err = 0;
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int i;
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u32 used_math;
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err |= __put_user(regs->cp0_epc, &sc->sc_pc);
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err |= __put_user(mflo3(), &sc->sc_lo3);
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}
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used_math = !!used_math();
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err |= __put_user(used_math, &sc->sc_used_math);
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/*
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* Save FPU state to signal context. Signal handler
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* will "inherit" current FPU state.
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*/
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err |= protected_save_fp_context(sc);
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if (used_math) {
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/*
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* Save FPU state to signal context. Signal handler
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* will "inherit" current FPU state.
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*/
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err |= protected_save_fp_context32(sc);
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}
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return err;
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}
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static int
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check_and_restore_fp_context32(struct sigcontext32 __user *sc)
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{
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int err, sig;
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err = sig = fpcsr_pending(&sc->sc_fpc_csr);
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if (err > 0)
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err = 0;
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err |= protected_restore_fp_context32(sc);
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return err ?: sig;
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}
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static int restore_sigcontext32(struct pt_regs *regs,
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struct sigcontext32 __user *sc)
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{
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u32 used_math;
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int err = 0;
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s32 treg;
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int i;
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for (i = 1; i < 32; i++)
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err |= __get_user(regs->regs[i], &sc->sc_regs[i]);
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err |= __get_user(used_math, &sc->sc_used_math);
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conditional_used_math(used_math);
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if (used_math) {
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/* restore fpu context if we have used it before */
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if (!err)
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err = check_and_restore_fp_context32(sc);
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} else {
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/* signal handler may have used FPU. Give it up. */
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lose_fpu(0);
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}
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return err;
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return err ?: protected_restore_fp_context(sc);
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}
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/*
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.off_sc_fpc_csr = offsetof(struct sigcontext32, sc_fpc_csr),
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.off_sc_used_math = offsetof(struct sigcontext32, sc_used_math),
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};
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static int signal32_init(void)
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{
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if (cpu_has_fpu) {
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save_fp_context32 = _save_fp_context32;
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restore_fp_context32 = _restore_fp_context32;
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} else {
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save_fp_context32 = copy_fp_to_sigcontext32;
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restore_fp_context32 = copy_fp_from_sigcontext32;
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}
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return 0;
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}
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arch_initcall(signal32_init);
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