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ARM: 5960/1: ARM: perf-events: fix v7 event selection mask

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The event selection mask for ARMv7 cores [ARMV7_EVTSEL_MASK]
is incorrectly set to 0x7f. This means that the top bit of an
event ID is ignored, so counting branch misses (id=0x10) and
ISBs (id=0x90) give the same results.

This patch sets the event selection mask to the correct value
of 0xff.

Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Will Deacon 2010-02-26 10:46:15 +01:00 committed by Russell King
parent ddee87f208
commit d10fca9f39
1 changed files with 1 additions and 1 deletions
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arch/arm/kernel/perf_event.c
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@ -1625,7 +1625,7 @@ enum armv7_counters {
/*
* EVTSEL: Event selection reg
*/
#define ARMV7_EVTSEL_MASK 0x7f /* Mask for writable bits */
#define ARMV7_EVTSEL_MASK 0xff /* Mask for writable bits */
/*
* SELECT: Counter selection reg