forked from luck/tmp_suning_uos_patched
V4L/DVB (11697): tda10048: Add ability to select I/F at attach time.
tda10048: Add ability to select I/F at attach time. Signed-off-by: Steven Toth <stoth@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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17720e07b6
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d114153816
@ -25,6 +25,7 @@
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <asm/div64.h>
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#include "dvb_frontend.h"
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#include "dvb_math.h"
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#include "tda10048.h"
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@ -143,6 +144,15 @@ struct tda10048_state {
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struct dvb_frontend frontend;
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int fwloaded;
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u32 freq_if_hz;
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u32 xtal_hz;
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u32 pll_mfactor;
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u32 pll_nfactor;
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u32 pll_pfactor;
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u32 sample_freq;
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enum fe_bandwidth bandwidth;
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};
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static struct init_tab {
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@ -271,6 +281,199 @@ static int tda10048_writeregbulk(struct tda10048_state *state, u8 reg,
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return ret;
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}
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static int tda10048_set_phy2(struct dvb_frontend *fe, u32 sample_freq_hz,
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u32 if_hz)
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{
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struct tda10048_state *state = fe->demodulator_priv;
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u64 t;
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dprintk(1, "%s()\n", __func__);
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if (sample_freq_hz == 0)
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return -EINVAL;
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if (if_hz < (sample_freq_hz / 2)) {
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/* PHY2 = (if2/fs) * 2^15 */
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t = if_hz;
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t *= 10;
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t *= 32768;
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do_div(t, sample_freq_hz);
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t += 5;
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do_div(t, 10);
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} else {
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/* PHY2 = ((IF1-fs)/fs) * 2^15 */
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t = sample_freq_hz - if_hz;
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t *= 10;
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t *= 32768;
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do_div(t, sample_freq_hz);
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t += 5;
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do_div(t, 10);
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t = ~t + 1;
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}
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tda10048_writereg(state, TDA10048_FREQ_PHY2_LSB, (u8)t);
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tda10048_writereg(state, TDA10048_FREQ_PHY2_MSB, (u8)(t >> 8));
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return 0;
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}
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static int tda10048_set_wref(struct dvb_frontend *fe, u32 sample_freq_hz,
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u32 bw)
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{
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struct tda10048_state *state = fe->demodulator_priv;
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u64 t, z;
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u32 b = 8000000;
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dprintk(1, "%s()\n", __func__);
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if (sample_freq_hz == 0)
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return -EINVAL;
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if (bw == BANDWIDTH_6_MHZ)
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b = 6000000;
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else
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if (bw == BANDWIDTH_7_MHZ)
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b = 7000000;
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/* WREF = (B / (7 * fs)) * 2^31 */
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t = b * 10;
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/* avoid warning: this decimal constant is unsigned only in ISO C90 */
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/* t *= 2147483648 on 32bit platforms */
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t *= (2048 * 1024);
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t *= 1024;
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z = 7 * sample_freq_hz;
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do_div(t, z);
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t += 5;
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do_div(t, 10);
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tda10048_writereg(state, TDA10048_TIME_WREF_LSB, (u8)t);
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tda10048_writereg(state, TDA10048_TIME_WREF_MID1, (u8)(t >> 8));
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tda10048_writereg(state, TDA10048_TIME_WREF_MID2, (u8)(t >> 16));
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tda10048_writereg(state, TDA10048_TIME_WREF_MSB, (u8)(t >> 24));
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return 0;
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}
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static int tda10048_set_invwref(struct dvb_frontend *fe, u32 sample_freq_hz,
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u32 bw)
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{
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struct tda10048_state *state = fe->demodulator_priv;
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u64 t;
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u32 b = 8000000;
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dprintk(1, "%s()\n", __func__);
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if (sample_freq_hz == 0)
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return -EINVAL;
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if (bw == BANDWIDTH_6_MHZ)
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b = 6000000;
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else
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if (bw == BANDWIDTH_7_MHZ)
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b = 7000000;
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/* INVWREF = ((7 * fs) / B) * 2^5 */
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t = sample_freq_hz;
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t *= 7;
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t *= 32;
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t *= 10;
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do_div(t, b);
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t += 5;
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do_div(t, 10);
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tda10048_writereg(state, TDA10048_TIME_INVWREF_LSB, (u8)t);
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tda10048_writereg(state, TDA10048_TIME_INVWREF_MSB, (u8)(t >> 8));
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return 0;
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}
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static int tda10048_set_bandwidth(struct dvb_frontend *fe,
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enum fe_bandwidth bw)
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{
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struct tda10048_state *state = fe->demodulator_priv;
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dprintk(1, "%s(bw=%d)\n", __func__, bw);
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/* Bandwidth setting may need to be adjusted */
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switch (bw) {
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case BANDWIDTH_6_MHZ:
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case BANDWIDTH_7_MHZ:
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case BANDWIDTH_8_MHZ:
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tda10048_set_wref(fe, state->sample_freq, bw);
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tda10048_set_invwref(fe, state->sample_freq, bw);
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break;
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default:
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printk(KERN_ERR "%s() invalid bandwidth\n", __func__);
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return -EINVAL;
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}
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state->bandwidth = bw;
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return 0;
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}
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static int tda10048_set_pll(struct dvb_frontend *fe)
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{
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struct tda10048_state *state = fe->demodulator_priv;
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int ret = 0;
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dprintk(1, "%s()\n", __func__);
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if ((state->config->clk_freq_khz == TDA10048_CLK_4000) &&
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(state->config->if_freq_khz == TDA10048_IF_36130)) {
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state->freq_if_hz = TDA10048_IF_36130 * 1000;
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state->xtal_hz = TDA10048_CLK_4000 * 1000;
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state->pll_mfactor = 10;
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state->pll_nfactor = 0;
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state->pll_pfactor = 0;
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} else
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if ((state->config->clk_freq_khz == TDA10048_CLK_16000) &&
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(state->config->if_freq_khz == TDA10048_IF_4300)) {
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state->freq_if_hz = TDA10048_IF_4300 * 1000;
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state->xtal_hz = TDA10048_CLK_16000 * 1000;
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state->pll_mfactor = 10;
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state->pll_nfactor = 3;
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state->pll_pfactor = 0;
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} else
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if ((state->config->clk_freq_khz == TDA10048_CLK_16000) &&
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(state->config->if_freq_khz == TDA10048_IF_4000)) {
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state->freq_if_hz = TDA10048_IF_4000 * 1000;
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state->xtal_hz = TDA10048_CLK_16000 * 1000;
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state->pll_mfactor = 10;
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state->pll_nfactor = 3;
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state->pll_pfactor = 0;
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} else
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if ((state->config->clk_freq_khz == TDA10048_CLK_16000) &&
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(state->config->if_freq_khz == TDA10048_IF_36130)) {
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state->freq_if_hz = TDA10048_IF_36130 * 1000;
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state->xtal_hz = TDA10048_CLK_16000 * 1000;
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state->pll_mfactor = 10;
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state->pll_nfactor = 3;
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state->pll_pfactor = 0;
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} else {
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printk(KERN_ERR "%s() Incorrect attach settings\n", __func__);
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ret = -EINVAL;
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}
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dprintk(1, "- freq_if_hz = %d\n", state->freq_if_hz);
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dprintk(1, "- xtal_hz = %d\n", state->xtal_hz);
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dprintk(1, "- pll_mfactor = %d\n", state->pll_mfactor);
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dprintk(1, "- pll_nfactor = %d\n", state->pll_nfactor);
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dprintk(1, "- pll_pfactor = %d\n", state->pll_pfactor);
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/* Calculate the sample frequency */
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state->sample_freq = state->xtal_hz * (state->pll_mfactor + 45);
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state->sample_freq /= (state->pll_nfactor + 1);
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state->sample_freq /= (state->pll_pfactor + 4);
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dprintk(1, "- sample_freq = %d\n", state->sample_freq);
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tda10048_set_phy2(fe, state->sample_freq,
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state->config->if_freq_khz * 1000);
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tda10048_set_wref(fe, state->sample_freq, state->bandwidth);
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tda10048_set_invwref(fe, state->sample_freq, state->bandwidth);
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return ret;
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}
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static int tda10048_firmware_upload(struct dvb_frontend *fe)
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{
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struct tda10048_state *state = fe->demodulator_priv;
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@ -523,6 +726,9 @@ static int tda10048_set_frontend(struct dvb_frontend *fe,
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dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency);
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if (p->u.ofdm.bandwidth != state->bandwidth)
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tda10048_set_bandwidth(fe, p->u.ofdm.bandwidth);
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if (fe->ops.tuner_ops.set_params) {
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if (fe->ops.i2c_gate_ctrl)
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@ -558,9 +764,15 @@ static int tda10048_init(struct dvb_frontend *fe)
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/* Set either serial or parallel */
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tda10048_output_mode(fe, state->config->output_mode);
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/* set inversion */
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/* Set inversion */
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tda10048_set_inversion(fe, state->config->inversion);
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/* Establish default PLL values */
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tda10048_set_pll(fe);
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/* Establish default bandwidth */
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tda10048_set_bandwidth(fe, BANDWIDTH_8_MHZ);
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/* Ensure we leave the gate closed */
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tda10048_i2c_gate_ctrl(fe, 0);
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@ -830,6 +1042,7 @@ struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
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state->config = config;
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state->i2c = i2c;
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state->fwloaded = 0;
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state->bandwidth = BANDWIDTH_8_MHZ;
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/* check if the demod is present */
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if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048)
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@ -840,6 +1053,10 @@ struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
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sizeof(struct dvb_frontend_ops));
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state->frontend.demodulator_priv = state;
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/* Set the xtal and freq defaults */
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if (tda10048_set_pll(&state->frontend) != 0)
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goto error;
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/* Leave the gate closed */
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tda10048_i2c_gate_ctrl(&state->frontend, 0);
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@ -43,6 +43,20 @@ struct tda10048_config {
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#define TDA10048_INVERSION_OFF 0
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#define TDA10048_INVERSION_ON 1
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u8 inversion;
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#define TDA10048_IF_3300 3300
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#define TDA10048_IF_3500 3500
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#define TDA10048_IF_3800 3800
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#define TDA10048_IF_4000 4000
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#define TDA10048_IF_4300 4300
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#define TDA10048_IF_4500 4500
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#define TDA10048_IF_4750 4750
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#define TDA10048_IF_36130 36130
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u16 if_freq_khz;
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#define TDA10048_CLK_4000 4000
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#define TDA10048_CLK_16000 16000
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u16 clk_freq_khz;
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};
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#if defined(CONFIG_DVB_TDA10048) || \
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