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[ARM] Orion: use mv643xx_eth driver mbus window handling

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Make the Orion 5x platform code use the mbus window handling code
that's in the mv643xx_eth driver, instead of programming the GigE
block's mbus window registers by hand.

Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
This commit is contained in:
Lennert Buytenhek 2008-04-26 14:48:11 -04:00 committed by Nicolas Pitre
parent 28a4acb485
commit d236f5a5f7
3 changed files with 7 additions and 49 deletions
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47
arch/arm/mach-orion5x/addr-map.c
View File

@ -81,17 +81,6 @@
#define CPU_WIN_REMAP_LO(n) ORION5X_BRIDGE_REG(0x008 | ((n) << 4))
#define CPU_WIN_REMAP_HI(n) ORION5X_BRIDGE_REG(0x00c | ((n) << 4))
/*
* Gigabit Ethernet Address Decode Windows registers
*/
#define ETH_WIN_BASE(win) ORION5X_ETH_REG(0x200 + ((win) * 8))
#define ETH_WIN_SIZE(win) ORION5X_ETH_REG(0x204 + ((win) * 8))
#define ETH_WIN_REMAP(win) ORION5X_ETH_REG(0x280 + ((win) * 4))
#define ETH_WIN_EN ORION5X_ETH_REG(0x290)
#define ETH_WIN_PROT ORION5X_ETH_REG(0x294)
#define ETH_MAX_WIN 6
#define ETH_MAX_REMAP_WIN 4
struct mbus_dram_target_info orion5x_mbus_dram_info;
@ -202,39 +191,3 @@ void __init orion5x_setup_pcie_wa_win(u32 base, u32 size)
{
setup_cpu_win(7, base, size, TARGET_PCIE, ATTR_PCIE_WA, -1);
}
void __init orion5x_setup_eth_wins(void)
{
int i;
/*
* First, disable and clear windows
*/
for (i = 0; i < ETH_MAX_WIN; i++) {
orion5x_write(ETH_WIN_BASE(i), 0);
orion5x_write(ETH_WIN_SIZE(i), 0);
orion5x_setbits(ETH_WIN_EN, 1 << i);
orion5x_clrbits(ETH_WIN_PROT, 0x3 << (i * 2));
if (i < ETH_MAX_REMAP_WIN)
orion5x_write(ETH_WIN_REMAP(i), 0);
}
/*
* Setup windows for DDR banks.
*/
for (i = 0; i < DDR_MAX_CS; i++) {
u32 base, size;
size = orion5x_read(DDR_SIZE_CS(i));
base = orion5x_read(DDR_BASE_CS(i));
if (size & DDR_BANK_EN) {
base = DDR_REG_TO_BASE(base);
size = DDR_REG_TO_SIZE(size);
orion5x_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000);
orion5x_write(ETH_WIN_BASE(i), (base & 0xffff0000) |
(ATTR_DDR_CS(i) << 8) |
TARGET_DDR);
orion5x_clrbits(ETH_WIN_EN, 1 << i);
orion5x_setbits(ETH_WIN_PROT, 0x3 << (i * 2));
}
}
}

8
arch/arm/mach-orion5x/common.c
View File

@ -190,6 +190,10 @@ static struct platform_device orion5x_ehci1 = {
* (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
****************************************************************************/
struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
.dram = &orion5x_mbus_dram_info,
};
static struct resource orion5x_eth_shared_resources[] = {
{
.start = ORION5X_ETH_PHYS_BASE + 0x2000,
@ -201,6 +205,9 @@ static struct resource orion5x_eth_shared_resources[] = {
static struct platform_device orion5x_eth_shared = {
.name = MV643XX_ETH_SHARED_NAME,
.id = 0,
.dev = {
.platform_data = &orion5x_eth_shared_data,
},
.num_resources = 1,
.resource = orion5x_eth_shared_resources,
};
@ -362,7 +369,6 @@ void __init orion5x_init(void)
* Setup Orion address map
*/
orion5x_setup_cpu_mbus_bridge();
orion5x_setup_eth_wins();
/*
* Register devices.

1
arch/arm/mach-orion5x/common.h
View File

@ -22,7 +22,6 @@ void orion5x_setup_dev0_win(u32 base, u32 size);
void orion5x_setup_dev1_win(u32 base, u32 size);
void orion5x_setup_dev2_win(u32 base, u32 size);
void orion5x_setup_pcie_wa_win(u32 base, u32 size);
void orion5x_setup_eth_wins(void);
/*
* Shared code used internally by other Orion core functions.