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gpio-tz1090: Replace commas with semi-colons

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Replace commas with semicolons between irqchip callback initialisation
statements in tz1090_gpio_bank_probe. The commas appear to be a subtle
remnant of when the irqchips were statically initialised.

Thanks to Thomas Gleixner for spotting it while whipping up a coccinelle
script.

Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-metag@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
James Hogan 2014-03-04 11:28:48 +00:00 committed by Linus Walleij
parent f438acdf3d
commit d3e1445327
1 changed files with 14 additions and 14 deletions
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28
drivers/gpio/gpio-tz1090.c
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@ -488,26 +488,26 @@ static int tz1090_gpio_bank_probe(struct tz1090_gpio_bank_info *info)
gc->chip_types[0].handler = handle_level_irq;
gc->chip_types[0].regs.ack = REG_GPIO_IRQ_STS;
gc->chip_types[0].regs.mask = REG_GPIO_IRQ_EN;
gc->chip_types[0].chip.irq_startup = gpio_startup_irq,
gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit,
gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit,
gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit,
gc->chip_types[0].chip.irq_set_type = gpio_set_irq_type,
gc->chip_types[0].chip.irq_set_wake = gpio_set_irq_wake,
gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND,
gc->chip_types[0].chip.irq_startup = gpio_startup_irq;
gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit;
gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit;
gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;
gc->chip_types[0].chip.irq_set_type = gpio_set_irq_type;
gc->chip_types[0].chip.irq_set_wake = gpio_set_irq_wake;
gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND;
/* edge chip type */
gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH;
gc->chip_types[1].handler = handle_edge_irq;
gc->chip_types[1].regs.ack = REG_GPIO_IRQ_STS;
gc->chip_types[1].regs.mask = REG_GPIO_IRQ_EN;
gc->chip_types[1].chip.irq_startup = gpio_startup_irq,
gc->chip_types[1].chip.irq_ack = irq_gc_ack_clr_bit,
gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit,
gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit,
gc->chip_types[1].chip.irq_set_type = gpio_set_irq_type,
gc->chip_types[1].chip.irq_set_wake = gpio_set_irq_wake,
gc->chip_types[1].chip.flags = IRQCHIP_MASK_ON_SUSPEND,
gc->chip_types[1].chip.irq_startup = gpio_startup_irq;
gc->chip_types[1].chip.irq_ack = irq_gc_ack_clr_bit;
gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit;
gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit;
gc->chip_types[1].chip.irq_set_type = gpio_set_irq_type;
gc->chip_types[1].chip.irq_set_wake = gpio_set_irq_wake;
gc->chip_types[1].chip.flags = IRQCHIP_MASK_ON_SUSPEND;
/* Setup chained handler for this GPIO bank */
irq_set_handler_data(bank->irq, bank);