forked from luck/tmp_suning_uos_patched
IOMMU Fixes for Linux v4.0-rc6
This contains fixes for: * A VT-d issue where hardware domain-ids might be freed while still in use. * An ipmmu-vmsa issue where where the device-table was not zero terminated * Unchecked register access issue in the arm-smmu driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJVG+1oAAoJECvwRC2XARrjWB0P/i52bboZSEmU2oP8mMPTtJZa DUNUZeN2TspTmVjzQpKDLmeRKw4A0TDV6QJPceO7/AKKiMaovLdyeFXCsLIaIWWF i9n7pPCewE9Y/OE/Scxw+Urscf8t9PAp0YWWac0xjm0KzZMyVfU4JSev0Swn6wxq fP6xkAf24VcDldMwEP4vA3nMWs2RU6+ahF1M1EEUgAOXeXZRciZFh3sS+eNfl7Zo JijioP1X0/XLlKUJ6AUxm2tOkUCQ6XwEwmBA/V4NaCQMDe+8qXqgzSXtPbWcvCeK 5bpS0tuiyegXalR90vm0VAoTn1oFFGdjBxqbQx1T8ew5by+3j7M18DbtCSfE6jUG W4IEabqSMe8Q3KLWrT/kbri0Kyb9WI8BnIqvNCwaDU6M+1iJrXFRMgEKzSl8I+yP aCMyKPBXbrZOopwX3drgbSYINDCDG3wQB2N0NbIuiZBrDeyX2wxOVPqWTsnqT766 kTbZsMAr5aurs7lW3aiyuYbkyWV4prjDDpIIBwGrWyBdpcR2GFlD3+lo9cMjtGkE PF6M7W4AIaAoq4yD6N4ruUBfDBjY9jVwq06xQZVje5CbEdJ7NVxx9bO8Tz1NSPkV /Wo8tI+7b4tOuqks6vEb/uZqH4wXSLHyk5c+cy5uhR9StW+/IoIaEm6xYYHulG8i RGirVFSz4qgy1NGJrOqt =P6CS -----END PGP SIGNATURE----- Merge tag 'iommu-fixes-v4.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU fixes from Joerg Roedel: "This contains fixes for: - a VT-d issue where hardware domain-ids might be freed while still in use. - an ipmmu-vmsa issue where where the device-table was not zero terminated - unchecked register access issue in the arm-smmu driver" * tag 'iommu-fixes-v4.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: iommu/vt-d: Remove unused variable iommu: ipmmu-vmsa: Add terminating entry for ipmmu_of_ids iommu/vt-d: Detach domain *only* from attached iommus iommu/arm-smmu: fix ARM_SMMU_FEAT_TRANS_OPS condition
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@ -1288,10 +1288,13 @@ static phys_addr_t arm_smmu_iova_to_phys(struct iommu_domain *domain,
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return 0;
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spin_lock_irqsave(&smmu_domain->pgtbl_lock, flags);
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if (smmu_domain->smmu->features & ARM_SMMU_FEAT_TRANS_OPS)
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if (smmu_domain->smmu->features & ARM_SMMU_FEAT_TRANS_OPS &&
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smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {
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ret = arm_smmu_iova_to_phys_hard(domain, iova);
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else
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} else {
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ret = ops->iova_to_phys(ops, iova);
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}
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spin_unlock_irqrestore(&smmu_domain->pgtbl_lock, flags);
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return ret;
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@ -1556,7 +1559,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
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return -ENODEV;
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}
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if (smmu->version == 1 || (!(id & ID0_ATOSNS) && (id & ID0_S1TS))) {
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if ((id & ID0_S1TS) && ((smmu->version == 1) || (id & ID0_ATOSNS))) {
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smmu->features |= ARM_SMMU_FEAT_TRANS_OPS;
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dev_notice(smmu->dev, "\taddress translation ops\n");
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}
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@ -1742,9 +1742,8 @@ static int domain_init(struct dmar_domain *domain, int guest_width)
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static void domain_exit(struct dmar_domain *domain)
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{
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struct dmar_drhd_unit *drhd;
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struct intel_iommu *iommu;
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struct page *freelist = NULL;
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int i;
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/* Domain 0 is reserved, so dont process it */
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if (!domain)
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@ -1764,8 +1763,8 @@ static void domain_exit(struct dmar_domain *domain)
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/* clear attached or cached domains */
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rcu_read_lock();
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for_each_active_iommu(iommu, drhd)
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iommu_detach_domain(domain, iommu);
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for_each_set_bit(i, domain->iommu_bmp, g_num_of_iommus)
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iommu_detach_domain(domain, g_iommus[i]);
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rcu_read_unlock();
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dma_free_pagelist(freelist);
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@ -851,6 +851,7 @@ static int ipmmu_remove(struct platform_device *pdev)
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static const struct of_device_id ipmmu_of_ids[] = {
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{ .compatible = "renesas,ipmmu-vmsa", },
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{ }
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};
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static struct platform_driver ipmmu_driver = {
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