forked from luck/tmp_suning_uos_patched
KVM: ppc: optimize irq delivery path
In kvmppc_deliver_interrupt is just one case left in the switch and it is a rare one (less than 8%) when looking at the exit numbers. Therefore we can at least drop the switch/case and if an if. I inserted an unlikely too, but that's open for discussion. In kvmppc_can_deliver_interrupt all frequent cases are in the default case. I know compilers are smart but we can make it easier for them. By writing down all options and removing the default case combined with the fact that ithe values are constants 0..15 should allow the compiler to write an easy jump table. Modifying kvmppc_can_deliver_interrupt pointed me to the fact that gcc seems to be unable to reduce priority_exception[x] to a build time constant. Therefore I changed the usage of the translation arrays in the interrupt delivery path completely. It is now using priority without translation to irq on the full irq delivery path. To be able to do that ivpr regs are stored by their priority now. Additionally the decision made in kvmppc_can_deliver_interrupt is already sufficient to get the value of interrupt_msr_mask[x]. Therefore we can replace the 16x4byte array used here with a single 4byte variable (might still be one miss, but the chance to find this in cache should be better than the right entry of the whole array). Signed-off-by: Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com>
This commit is contained in:
parent
9ab80843c0
commit
d4cf3892e5
@ -36,9 +36,6 @@ enum emulation_result {
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EMULATE_FAIL, /* can't emulate this instruction */
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};
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extern const unsigned char exception_priority[];
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extern const unsigned char priority_exception[];
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extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu);
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extern char kvmppc_handlers_start[];
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extern unsigned long kvmppc_handler_len;
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@ -228,39 +228,56 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
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vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
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case SPRN_IVPR:
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vcpu->arch.ivpr = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivpr = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR0:
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vcpu->arch.ivor[0] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR1:
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vcpu->arch.ivor[1] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR2:
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vcpu->arch.ivor[2] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR3:
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vcpu->arch.ivor[3] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR4:
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vcpu->arch.ivor[4] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR5:
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vcpu->arch.ivor[5] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR6:
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vcpu->arch.ivor[6] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR7:
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vcpu->arch.ivor[7] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR8:
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vcpu->arch.ivor[8] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR9:
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vcpu->arch.ivor[9] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR10:
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vcpu->arch.ivor[10] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR11:
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vcpu->arch.ivor[11] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR12:
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vcpu->arch.ivor[12] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR13:
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vcpu->arch.ivor[13] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR14:
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vcpu->arch.ivor[14] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
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break;
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case SPRN_IVOR15:
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vcpu->arch.ivor[15] = vcpu->arch.gpr[rs]; break;
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vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
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break;
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default:
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return EMULATE_FAIL;
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@ -295,37 +312,54 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
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vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
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case SPRN_IVOR0:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[0]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
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break;
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case SPRN_IVOR1:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[1]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
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break;
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case SPRN_IVOR2:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[2]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
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break;
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case SPRN_IVOR3:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[3]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
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break;
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case SPRN_IVOR4:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[4]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
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break;
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case SPRN_IVOR5:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[5]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
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break;
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case SPRN_IVOR6:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[6]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
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break;
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case SPRN_IVOR7:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[7]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
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break;
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case SPRN_IVOR8:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[8]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
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break;
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case SPRN_IVOR9:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[9]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
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break;
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case SPRN_IVOR10:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[10]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
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break;
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case SPRN_IVOR11:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[11]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
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break;
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case SPRN_IVOR12:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[12]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
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break;
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case SPRN_IVOR13:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[13]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
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break;
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case SPRN_IVOR14:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[14]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
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break;
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case SPRN_IVOR15:
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[15]; break;
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vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
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break;
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default:
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return EMULATE_FAIL;
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}
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@ -55,64 +55,6 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
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{ NULL }
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};
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static const u32 interrupt_msr_mask[16] = {
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[BOOKE_INTERRUPT_CRITICAL] = MSR_ME,
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[BOOKE_INTERRUPT_MACHINE_CHECK] = 0,
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[BOOKE_INTERRUPT_DATA_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_INST_STORAGE] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_EXTERNAL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_ALIGNMENT] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_PROGRAM] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_FP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_SYSCALL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_AP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_DECREMENTER] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_FIT] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_WATCHDOG] = MSR_ME,
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[BOOKE_INTERRUPT_DTLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_ITLB_MISS] = MSR_CE|MSR_ME|MSR_DE,
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[BOOKE_INTERRUPT_DEBUG] = MSR_ME,
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};
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const unsigned char exception_priority[] = {
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[BOOKE_INTERRUPT_DATA_STORAGE] = 0,
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[BOOKE_INTERRUPT_INST_STORAGE] = 1,
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[BOOKE_INTERRUPT_ALIGNMENT] = 2,
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[BOOKE_INTERRUPT_PROGRAM] = 3,
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[BOOKE_INTERRUPT_FP_UNAVAIL] = 4,
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[BOOKE_INTERRUPT_SYSCALL] = 5,
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[BOOKE_INTERRUPT_AP_UNAVAIL] = 6,
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[BOOKE_INTERRUPT_DTLB_MISS] = 7,
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[BOOKE_INTERRUPT_ITLB_MISS] = 8,
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[BOOKE_INTERRUPT_MACHINE_CHECK] = 9,
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[BOOKE_INTERRUPT_DEBUG] = 10,
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[BOOKE_INTERRUPT_CRITICAL] = 11,
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[BOOKE_INTERRUPT_WATCHDOG] = 12,
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[BOOKE_INTERRUPT_EXTERNAL] = 13,
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[BOOKE_INTERRUPT_FIT] = 14,
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[BOOKE_INTERRUPT_DECREMENTER] = 15,
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};
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const unsigned char priority_exception[] = {
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BOOKE_INTERRUPT_DATA_STORAGE,
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BOOKE_INTERRUPT_INST_STORAGE,
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BOOKE_INTERRUPT_ALIGNMENT,
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BOOKE_INTERRUPT_PROGRAM,
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BOOKE_INTERRUPT_FP_UNAVAIL,
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BOOKE_INTERRUPT_SYSCALL,
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BOOKE_INTERRUPT_AP_UNAVAIL,
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BOOKE_INTERRUPT_DTLB_MISS,
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BOOKE_INTERRUPT_ITLB_MISS,
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BOOKE_INTERRUPT_MACHINE_CHECK,
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BOOKE_INTERRUPT_DEBUG,
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BOOKE_INTERRUPT_CRITICAL,
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BOOKE_INTERRUPT_WATCHDOG,
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BOOKE_INTERRUPT_EXTERNAL,
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BOOKE_INTERRUPT_FIT,
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BOOKE_INTERRUPT_DECREMENTER,
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};
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/* TODO: use vcpu_printf() */
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void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
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{
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@ -133,103 +75,96 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
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}
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}
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static void kvmppc_booke_queue_exception(struct kvm_vcpu *vcpu, int exception)
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static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
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unsigned int priority)
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{
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unsigned int priority = exception_priority[exception];
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set_bit(priority, &vcpu->arch.pending_exceptions);
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}
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static void kvmppc_booke_clear_exception(struct kvm_vcpu *vcpu, int exception)
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{
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unsigned int priority = exception_priority[exception];
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clear_bit(priority, &vcpu->arch.pending_exceptions);
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}
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void kvmppc_core_queue_program(struct kvm_vcpu *vcpu)
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{
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kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
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}
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void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
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{
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kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_DECREMENTER);
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
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}
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int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
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{
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unsigned int priority = exception_priority[BOOKE_INTERRUPT_DECREMENTER];
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return test_bit(priority, &vcpu->arch.pending_exceptions);
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return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
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}
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void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
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struct kvm_interrupt *irq)
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{
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kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_EXTERNAL);
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kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL);
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}
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/* Check if we are ready to deliver the interrupt */
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static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
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/* Deliver the interrupt of the corresponding priority, if possible. */
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static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
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unsigned int priority)
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{
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int r;
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int allowed = 0;
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ulong msr_mask;
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switch (interrupt) {
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case BOOKE_INTERRUPT_CRITICAL:
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r = vcpu->arch.msr & MSR_CE;
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switch (priority) {
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case BOOKE_IRQPRIO_PROGRAM:
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case BOOKE_IRQPRIO_DTLB_MISS:
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case BOOKE_IRQPRIO_ITLB_MISS:
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case BOOKE_IRQPRIO_SYSCALL:
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case BOOKE_IRQPRIO_DATA_STORAGE:
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case BOOKE_IRQPRIO_INST_STORAGE:
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case BOOKE_IRQPRIO_FP_UNAVAIL:
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case BOOKE_IRQPRIO_AP_UNAVAIL:
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case BOOKE_IRQPRIO_ALIGNMENT:
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allowed = 1;
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msr_mask = MSR_CE|MSR_ME|MSR_DE;
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break;
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case BOOKE_INTERRUPT_MACHINE_CHECK:
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r = vcpu->arch.msr & MSR_ME;
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case BOOKE_IRQPRIO_CRITICAL:
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case BOOKE_IRQPRIO_WATCHDOG:
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allowed = vcpu->arch.msr & MSR_CE;
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msr_mask = MSR_ME;
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break;
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case BOOKE_INTERRUPT_EXTERNAL:
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r = vcpu->arch.msr & MSR_EE;
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case BOOKE_IRQPRIO_MACHINE_CHECK:
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allowed = vcpu->arch.msr & MSR_ME;
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msr_mask = 0;
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break;
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case BOOKE_INTERRUPT_DECREMENTER:
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r = vcpu->arch.msr & MSR_EE;
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case BOOKE_IRQPRIO_EXTERNAL:
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case BOOKE_IRQPRIO_DECREMENTER:
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case BOOKE_IRQPRIO_FIT:
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allowed = vcpu->arch.msr & MSR_EE;
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msr_mask = MSR_CE|MSR_ME|MSR_DE;
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break;
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case BOOKE_INTERRUPT_FIT:
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r = vcpu->arch.msr & MSR_EE;
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break;
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case BOOKE_INTERRUPT_WATCHDOG:
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r = vcpu->arch.msr & MSR_CE;
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break;
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case BOOKE_INTERRUPT_DEBUG:
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r = vcpu->arch.msr & MSR_DE;
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break;
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default:
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r = 1;
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}
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return r;
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}
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static void kvmppc_booke_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt)
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{
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switch (interrupt) {
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case BOOKE_INTERRUPT_DECREMENTER:
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vcpu->arch.tsr |= TSR_DIS;
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case BOOKE_IRQPRIO_DEBUG:
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allowed = vcpu->arch.msr & MSR_DE;
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msr_mask = MSR_ME;
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break;
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}
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vcpu->arch.srr0 = vcpu->arch.pc;
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vcpu->arch.srr1 = vcpu->arch.msr;
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vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt];
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kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]);
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if (allowed) {
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vcpu->arch.srr0 = vcpu->arch.pc;
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vcpu->arch.srr1 = vcpu->arch.msr;
|
||||
vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
|
||||
kvmppc_set_msr(vcpu, vcpu->arch.msr & msr_mask);
|
||||
|
||||
clear_bit(priority, &vcpu->arch.pending_exceptions);
|
||||
}
|
||||
|
||||
return allowed;
|
||||
}
|
||||
|
||||
/* Check pending exceptions and deliver one, if possible. */
|
||||
void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
unsigned long *pending = &vcpu->arch.pending_exceptions;
|
||||
unsigned int exception;
|
||||
unsigned int priority;
|
||||
|
||||
priority = __ffs(*pending);
|
||||
while (priority <= BOOKE_MAX_INTERRUPT) {
|
||||
exception = priority_exception[priority];
|
||||
if (kvmppc_can_deliver_interrupt(vcpu, exception)) {
|
||||
kvmppc_booke_clear_exception(vcpu, exception);
|
||||
kvmppc_booke_deliver_interrupt(vcpu, exception);
|
||||
if (kvmppc_booke_irqprio_deliver(vcpu, priority))
|
||||
break;
|
||||
}
|
||||
|
||||
priority = find_next_bit(pending,
|
||||
BITS_PER_BYTE * sizeof(*pending),
|
||||
@ -287,7 +222,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
||||
/* Program traps generated by user-level software must be handled
|
||||
* by the guest kernel. */
|
||||
vcpu->arch.esr = vcpu->arch.fault_esr;
|
||||
kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
|
||||
r = RESUME_GUEST;
|
||||
break;
|
||||
}
|
||||
@ -321,27 +256,27 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
||||
break;
|
||||
|
||||
case BOOKE_INTERRUPT_FP_UNAVAIL:
|
||||
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
|
||||
r = RESUME_GUEST;
|
||||
break;
|
||||
|
||||
case BOOKE_INTERRUPT_DATA_STORAGE:
|
||||
vcpu->arch.dear = vcpu->arch.fault_dear;
|
||||
vcpu->arch.esr = vcpu->arch.fault_esr;
|
||||
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
|
||||
vcpu->stat.dsi_exits++;
|
||||
r = RESUME_GUEST;
|
||||
break;
|
||||
|
||||
case BOOKE_INTERRUPT_INST_STORAGE:
|
||||
vcpu->arch.esr = vcpu->arch.fault_esr;
|
||||
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
|
||||
vcpu->stat.isi_exits++;
|
||||
r = RESUME_GUEST;
|
||||
break;
|
||||
|
||||
case BOOKE_INTERRUPT_SYSCALL:
|
||||
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
|
||||
vcpu->stat.syscall_exits++;
|
||||
r = RESUME_GUEST;
|
||||
break;
|
||||
@ -355,7 +290,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
||||
gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr);
|
||||
if (!gtlbe) {
|
||||
/* The guest didn't have a mapping for it. */
|
||||
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
|
||||
vcpu->arch.dear = vcpu->arch.fault_dear;
|
||||
vcpu->arch.esr = vcpu->arch.fault_esr;
|
||||
vcpu->stat.dtlb_real_miss_exits++;
|
||||
@ -398,7 +333,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
||||
gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr);
|
||||
if (!gtlbe) {
|
||||
/* The guest didn't have a mapping for it. */
|
||||
kvmppc_booke_queue_exception(vcpu, exit_nr);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
|
||||
vcpu->stat.itlb_real_miss_exits++;
|
||||
break;
|
||||
}
|
||||
@ -418,7 +353,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
||||
gtlbe->word2);
|
||||
} else {
|
||||
/* Guest mapped and leaped at non-RAM! */
|
||||
kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_MACHINE_CHECK);
|
||||
kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
|
||||
}
|
||||
|
||||
break;
|
||||
|
@ -23,6 +23,24 @@
|
||||
#include <linux/types.h>
|
||||
#include <linux/kvm_host.h>
|
||||
|
||||
/* interrupt priortity ordering */
|
||||
#define BOOKE_IRQPRIO_DATA_STORAGE 0
|
||||
#define BOOKE_IRQPRIO_INST_STORAGE 1
|
||||
#define BOOKE_IRQPRIO_ALIGNMENT 2
|
||||
#define BOOKE_IRQPRIO_PROGRAM 3
|
||||
#define BOOKE_IRQPRIO_FP_UNAVAIL 4
|
||||
#define BOOKE_IRQPRIO_SYSCALL 5
|
||||
#define BOOKE_IRQPRIO_AP_UNAVAIL 6
|
||||
#define BOOKE_IRQPRIO_DTLB_MISS 7
|
||||
#define BOOKE_IRQPRIO_ITLB_MISS 8
|
||||
#define BOOKE_IRQPRIO_MACHINE_CHECK 9
|
||||
#define BOOKE_IRQPRIO_DEBUG 10
|
||||
#define BOOKE_IRQPRIO_CRITICAL 11
|
||||
#define BOOKE_IRQPRIO_WATCHDOG 12
|
||||
#define BOOKE_IRQPRIO_EXTERNAL 13
|
||||
#define BOOKE_IRQPRIO_FIT 14
|
||||
#define BOOKE_IRQPRIO_DECREMENTER 15
|
||||
|
||||
/* Helper function for "full" MSR writes. No need to call this if only EE is
|
||||
* changing. */
|
||||
static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
|
||||
|
Loading…
Reference in New Issue
Block a user