forked from luck/tmp_suning_uos_patched
Merge branch 'mlxsw-next'
Jiri Pirko says: ==================== mlxsw: small driver update For details, see individual patches. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
d5a14ff0ff
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@ -31,7 +31,7 @@ config MLXSW_PCI
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config MLXSW_SWITCHX2
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tristate "Mellanox Technologies SwitchX-2 support"
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depends on MLXSW_CORE && NET_SWITCHDEV
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depends on MLXSW_CORE && MLXSW_PCI && NET_SWITCHDEV
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default m
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---help---
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This driver supports Mellanox Technologies SwitchX-2 Ethernet
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@ -42,7 +42,7 @@ config MLXSW_SWITCHX2
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config MLXSW_SPECTRUM
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tristate "Mellanox Technologies Spectrum support"
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depends on MLXSW_CORE && NET_SWITCHDEV && VLAN_8021Q
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depends on MLXSW_CORE && MLXSW_PCI && NET_SWITCHDEV && VLAN_8021Q
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default m
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---help---
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This driver supports Mellanox Technologies Spectrum Ethernet
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@ -823,17 +823,6 @@ static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
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spin_lock(&mlxsw_core_driver_list_lock);
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mlxsw_driver = __driver_find(kind);
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if (!mlxsw_driver) {
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spin_unlock(&mlxsw_core_driver_list_lock);
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request_module(MLXSW_MODULE_ALIAS_PREFIX "%s", kind);
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spin_lock(&mlxsw_core_driver_list_lock);
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mlxsw_driver = __driver_find(kind);
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}
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if (mlxsw_driver) {
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if (!try_module_get(mlxsw_driver->owner))
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mlxsw_driver = NULL;
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}
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spin_unlock(&mlxsw_core_driver_list_lock);
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return mlxsw_driver;
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}
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@ -845,9 +834,6 @@ static void mlxsw_core_driver_put(const char *kind)
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spin_lock(&mlxsw_core_driver_list_lock);
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mlxsw_driver = __driver_find(kind);
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spin_unlock(&mlxsw_core_driver_list_lock);
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if (!mlxsw_driver)
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return;
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module_put(mlxsw_driver->owner);
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}
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static int mlxsw_core_debugfs_init(struct mlxsw_core *mlxsw_core)
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@ -51,13 +51,6 @@
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#include "cmd.h"
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#include "resources.h"
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#define MLXSW_MODULE_ALIAS_PREFIX "mlxsw-driver-"
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#define MODULE_MLXSW_DRIVER_ALIAS(kind) \
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MODULE_ALIAS(MLXSW_MODULE_ALIAS_PREFIX kind)
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#define MLXSW_DEVICE_KIND_SWITCHX2 "switchx2"
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#define MLXSW_DEVICE_KIND_SPECTRUM "spectrum"
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struct mlxsw_core;
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struct mlxsw_driver;
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struct mlxsw_bus;
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@ -221,7 +214,6 @@ struct mlxsw_config_profile {
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struct mlxsw_driver {
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struct list_head list;
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const char *kind;
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struct module *owner;
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size_t priv_size;
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int (*init)(struct mlxsw_core *mlxsw_core,
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const struct mlxsw_bus_info *mlxsw_bus_info);
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@ -48,6 +48,7 @@
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#include <linux/seq_file.h>
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#include <linux/string.h>
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#include "pci_hw.h"
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#include "pci.h"
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#include "core.h"
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#include "cmd.h"
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@ -56,26 +57,8 @@
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static const char mlxsw_pci_driver_name[] = "mlxsw_pci";
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static const struct pci_device_id mlxsw_pci_id_table[] = {
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{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SWITCHX2), 0},
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{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
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{0, }
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};
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static struct dentry *mlxsw_pci_dbg_root;
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static const char *mlxsw_pci_device_kind_get(const struct pci_device_id *id)
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{
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switch (id->device) {
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case PCI_DEVICE_ID_MELLANOX_SWITCHX2:
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return MLXSW_DEVICE_KIND_SWITCHX2;
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case PCI_DEVICE_ID_MELLANOX_SPECTRUM:
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return MLXSW_DEVICE_KIND_SPECTRUM;
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default:
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BUG();
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}
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}
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#define mlxsw_pci_write32(mlxsw_pci, reg, val) \
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iowrite32be(val, (mlxsw_pci)->hw_addr + (MLXSW_PCI_ ## reg))
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#define mlxsw_pci_read32(mlxsw_pci, reg) \
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@ -1553,7 +1536,7 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core,
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err = request_irq(mlxsw_pci->msix_entry.vector,
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mlxsw_pci_eq_irq_handler, 0,
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mlxsw_pci_driver_name, mlxsw_pci);
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mlxsw_pci->bus_info.device_kind, mlxsw_pci);
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if (err) {
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dev_err(&pdev->dev, "IRQ request failed\n");
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goto err_request_eq_irq;
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@ -1793,6 +1776,7 @@ static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci)
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static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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const char *driver_name = pdev->driver->name;
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struct mlxsw_pci *mlxsw_pci;
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int err;
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@ -1806,7 +1790,7 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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goto err_pci_enable_device;
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}
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err = pci_request_regions(pdev, mlxsw_pci_driver_name);
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err = pci_request_regions(pdev, driver_name);
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if (err) {
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dev_err(&pdev->dev, "pci_request_regions failed\n");
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goto err_pci_request_regions;
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@ -1857,7 +1841,7 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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goto err_msix_init;
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}
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mlxsw_pci->bus_info.device_kind = mlxsw_pci_device_kind_get(id);
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mlxsw_pci->bus_info.device_kind = driver_name;
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mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev);
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mlxsw_pci->bus_info.dev = &pdev->dev;
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@ -1909,33 +1893,30 @@ static void mlxsw_pci_remove(struct pci_dev *pdev)
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kfree(mlxsw_pci);
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}
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static struct pci_driver mlxsw_pci_driver = {
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.name = mlxsw_pci_driver_name,
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.id_table = mlxsw_pci_id_table,
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.probe = mlxsw_pci_probe,
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.remove = mlxsw_pci_remove,
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};
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int mlxsw_pci_driver_register(struct pci_driver *pci_driver)
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{
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pci_driver->probe = mlxsw_pci_probe;
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pci_driver->remove = mlxsw_pci_remove;
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return pci_register_driver(pci_driver);
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}
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EXPORT_SYMBOL(mlxsw_pci_driver_register);
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void mlxsw_pci_driver_unregister(struct pci_driver *pci_driver)
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{
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pci_unregister_driver(pci_driver);
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}
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EXPORT_SYMBOL(mlxsw_pci_driver_unregister);
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static int __init mlxsw_pci_module_init(void)
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{
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int err;
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mlxsw_pci_dbg_root = debugfs_create_dir(mlxsw_pci_driver_name, NULL);
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if (!mlxsw_pci_dbg_root)
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return -ENOMEM;
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err = pci_register_driver(&mlxsw_pci_driver);
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if (err)
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goto err_register_driver;
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return 0;
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err_register_driver:
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debugfs_remove_recursive(mlxsw_pci_dbg_root);
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return err;
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}
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static void __exit mlxsw_pci_module_exit(void)
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{
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pci_unregister_driver(&mlxsw_pci_driver);
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debugfs_remove_recursive(mlxsw_pci_dbg_root);
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}
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@ -1945,4 +1926,3 @@ module_exit(mlxsw_pci_module_exit);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
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MODULE_DESCRIPTION("Mellanox switch PCI interface driver");
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MODULE_DEVICE_TABLE(pci, mlxsw_pci_id_table);
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@ -1,7 +1,7 @@
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/*
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* drivers/net/ethernet/mellanox/mlxsw/pci.h
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* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
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* Copyright (c) 2016 Mellanox Technologies. All rights reserved.
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* Copyright (c) 2016 Jiri Pirko <jiri@mellanox.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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@ -35,197 +35,29 @@
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#ifndef _MLXSW_PCI_H
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#define _MLXSW_PCI_H
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#include <linux/bitops.h>
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#include <linux/pci.h>
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#include "item.h"
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#define PCI_DEVICE_ID_MELLANOX_SWITCHX2 0xc738
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#define PCI_DEVICE_ID_MELLANOX_SPECTRUM 0xcb84
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#define PCI_DEVICE_ID_MELLANOX_SWITCHX2 0xc738
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#define PCI_DEVICE_ID_MELLANOX_SPECTRUM 0xcb84
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#define MLXSW_PCI_BAR0_SIZE (1024 * 1024) /* 1MB */
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#define MLXSW_PCI_PAGE_SIZE 4096
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#if IS_ENABLED(CONFIG_MLXSW_PCI)
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#define MLXSW_PCI_CIR_BASE 0x71000
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#define MLXSW_PCI_CIR_IN_PARAM_HI MLXSW_PCI_CIR_BASE
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#define MLXSW_PCI_CIR_IN_PARAM_LO (MLXSW_PCI_CIR_BASE + 0x04)
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#define MLXSW_PCI_CIR_IN_MODIFIER (MLXSW_PCI_CIR_BASE + 0x08)
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#define MLXSW_PCI_CIR_OUT_PARAM_HI (MLXSW_PCI_CIR_BASE + 0x0C)
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#define MLXSW_PCI_CIR_OUT_PARAM_LO (MLXSW_PCI_CIR_BASE + 0x10)
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#define MLXSW_PCI_CIR_TOKEN (MLXSW_PCI_CIR_BASE + 0x14)
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#define MLXSW_PCI_CIR_CTRL (MLXSW_PCI_CIR_BASE + 0x18)
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#define MLXSW_PCI_CIR_CTRL_GO_BIT BIT(23)
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#define MLXSW_PCI_CIR_CTRL_EVREQ_BIT BIT(22)
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#define MLXSW_PCI_CIR_CTRL_OPCODE_MOD_SHIFT 12
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#define MLXSW_PCI_CIR_CTRL_STATUS_SHIFT 24
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#define MLXSW_PCI_CIR_TIMEOUT_MSECS 1000
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int mlxsw_pci_driver_register(struct pci_driver *pci_driver);
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void mlxsw_pci_driver_unregister(struct pci_driver *pci_driver);
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#define MLXSW_PCI_SW_RESET 0xF0010
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#define MLXSW_PCI_SW_RESET_RST_BIT BIT(0)
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#define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 5000
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#define MLXSW_PCI_FW_READY 0xA1844
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#define MLXSW_PCI_FW_READY_MASK 0xFF
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#define MLXSW_PCI_FW_READY_MAGIC 0x5E
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#else
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#define MLXSW_PCI_DOORBELL_SDQ_OFFSET 0x000
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#define MLXSW_PCI_DOORBELL_RDQ_OFFSET 0x200
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#define MLXSW_PCI_DOORBELL_CQ_OFFSET 0x400
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#define MLXSW_PCI_DOORBELL_EQ_OFFSET 0x600
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#define MLXSW_PCI_DOORBELL_ARM_CQ_OFFSET 0x800
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#define MLXSW_PCI_DOORBELL_ARM_EQ_OFFSET 0xA00
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static inline int
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mlxsw_pci_driver_register(struct pci_driver *pci_driver)
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{
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return 0;
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}
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#define MLXSW_PCI_DOORBELL(offset, type_offset, num) \
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((offset) + (type_offset) + (num) * 4)
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#define MLXSW_PCI_CQS_MAX 96
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#define MLXSW_PCI_EQS_COUNT 2
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#define MLXSW_PCI_EQ_ASYNC_NUM 0
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#define MLXSW_PCI_EQ_COMP_NUM 1
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#define MLXSW_PCI_AQ_PAGES 8
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#define MLXSW_PCI_AQ_SIZE (MLXSW_PCI_PAGE_SIZE * MLXSW_PCI_AQ_PAGES)
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#define MLXSW_PCI_WQE_SIZE 32 /* 32 bytes per element */
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#define MLXSW_PCI_CQE_SIZE 16 /* 16 bytes per element */
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#define MLXSW_PCI_EQE_SIZE 16 /* 16 bytes per element */
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#define MLXSW_PCI_WQE_COUNT (MLXSW_PCI_AQ_SIZE / MLXSW_PCI_WQE_SIZE)
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#define MLXSW_PCI_CQE_COUNT (MLXSW_PCI_AQ_SIZE / MLXSW_PCI_CQE_SIZE)
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#define MLXSW_PCI_EQE_COUNT (MLXSW_PCI_AQ_SIZE / MLXSW_PCI_EQE_SIZE)
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#define MLXSW_PCI_EQE_UPDATE_COUNT 0x80
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#define MLXSW_PCI_WQE_SG_ENTRIES 3
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#define MLXSW_PCI_WQE_TYPE_ETHERNET 0xA
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|
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/* pci_wqe_c
|
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* If set it indicates that a completion should be reported upon
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* execution of this descriptor.
|
||||
*/
|
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MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
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|
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/* pci_wqe_lp
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* Local Processing, set if packet should be processed by the local
|
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* switch hardware:
|
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* For Ethernet EMAD (Direct Route and non Direct Route) -
|
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* must be set if packet destination is local device
|
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* For InfiniBand CTL - must be set if packet destination is local device
|
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* Otherwise it must be clear
|
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* Local Process packets must not exceed the size of 2K (including payload
|
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* and headers).
|
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*/
|
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MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
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|
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/* pci_wqe_type
|
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* Packet type.
|
||||
*/
|
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MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
|
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|
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/* pci_wqe_byte_count
|
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* Size of i-th scatter/gather entry, 0 if entry is unused.
|
||||
*/
|
||||
MLXSW_ITEM16_INDEXED(pci, wqe, byte_count, 0x02, 0, 14, 0x02, 0x00, false);
|
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|
||||
/* pci_wqe_address
|
||||
* Physical address of i-th scatter/gather entry.
|
||||
* Gather Entries must be 2Byte aligned.
|
||||
*/
|
||||
MLXSW_ITEM64_INDEXED(pci, wqe, address, 0x08, 0, 64, 0x8, 0x0, false);
|
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|
||||
/* pci_cqe_lag
|
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* Packet arrives from a port which is a LAG
|
||||
*/
|
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MLXSW_ITEM32(pci, cqe, lag, 0x00, 23, 1);
|
||||
|
||||
/* pci_cqe_system_port/lag_id
|
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* When lag=0: System port on which the packet was received
|
||||
* When lag=1:
|
||||
* bits [15:4] LAG ID on which the packet was received
|
||||
* bits [3:0] sub_port on which the packet was received
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, system_port, 0x00, 0, 16);
|
||||
MLXSW_ITEM32(pci, cqe, lag_id, 0x00, 4, 12);
|
||||
MLXSW_ITEM32(pci, cqe, lag_port_index, 0x00, 0, 4);
|
||||
|
||||
/* pci_cqe_wqe_counter
|
||||
* WQE count of the WQEs completed on the associated dqn
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, wqe_counter, 0x04, 16, 16);
|
||||
|
||||
/* pci_cqe_byte_count
|
||||
* Byte count of received packets including additional two
|
||||
* Reserved Bytes that are append to the end of the frame.
|
||||
* Reserved for Send CQE.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, byte_count, 0x04, 0, 14);
|
||||
|
||||
/* pci_cqe_trap_id
|
||||
* Trap ID that captured the packet.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, trap_id, 0x08, 0, 8);
|
||||
|
||||
/* pci_cqe_crc
|
||||
* Length include CRC. Indicates the length field includes
|
||||
* the packet's CRC.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, crc, 0x0C, 8, 1);
|
||||
|
||||
/* pci_cqe_e
|
||||
* CQE with Error.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, e, 0x0C, 7, 1);
|
||||
|
||||
/* pci_cqe_sr
|
||||
* 1 - Send Queue
|
||||
* 0 - Receive Queue
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, sr, 0x0C, 6, 1);
|
||||
|
||||
/* pci_cqe_dqn
|
||||
* Descriptor Queue (DQ) Number.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, dqn, 0x0C, 1, 5);
|
||||
|
||||
/* pci_cqe_owner
|
||||
* Ownership bit.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, owner, 0x0C, 0, 1);
|
||||
|
||||
/* pci_eqe_event_type
|
||||
* Event type.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, event_type, 0x0C, 24, 8);
|
||||
#define MLXSW_PCI_EQE_EVENT_TYPE_COMP 0x00
|
||||
#define MLXSW_PCI_EQE_EVENT_TYPE_CMD 0x0A
|
||||
|
||||
/* pci_eqe_event_sub_type
|
||||
* Event type.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, event_sub_type, 0x0C, 16, 8);
|
||||
|
||||
/* pci_eqe_cqn
|
||||
* Completion Queue that triggeret this EQE.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cqn, 0x0C, 8, 7);
|
||||
|
||||
/* pci_eqe_owner
|
||||
* Ownership bit.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, owner, 0x0C, 0, 1);
|
||||
|
||||
/* pci_eqe_cmd_token
|
||||
* Command completion event - token
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_token, 0x08, 16, 16);
|
||||
|
||||
/* pci_eqe_cmd_status
|
||||
* Command completion event - status
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_status, 0x08, 0, 8);
|
||||
|
||||
/* pci_eqe_cmd_out_param_h
|
||||
* Command completion event - output parameter - higher part
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_out_param_h, 0x0C, 0, 32);
|
||||
|
||||
/* pci_eqe_cmd_out_param_l
|
||||
* Command completion event - output parameter - lower part
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_out_param_l, 0x10, 0, 32);
|
||||
static inline void
|
||||
mlxsw_pci_driver_unregister(struct pci_driver *pci_driver)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
229
drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
Normal file
229
drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
Normal file
|
|
@ -0,0 +1,229 @@
|
|||
/*
|
||||
* drivers/net/ethernet/mellanox/mlxsw/pci_hw.h
|
||||
* Copyright (c) 2015-2016 Mellanox Technologies. All rights reserved.
|
||||
* Copyright (c) 2015-2016 Jiri Pirko <jiri@mellanox.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the names of the copyright holders nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from
|
||||
* this software without specific prior written permission.
|
||||
*
|
||||
* Alternatively, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") version 2 as published by the Free
|
||||
* Software Foundation.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _MLXSW_PCI_HW_H
|
||||
#define _MLXSW_PCI_HW_H
|
||||
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include "item.h"
|
||||
|
||||
#define MLXSW_PCI_BAR0_SIZE (1024 * 1024) /* 1MB */
|
||||
#define MLXSW_PCI_PAGE_SIZE 4096
|
||||
|
||||
#define MLXSW_PCI_CIR_BASE 0x71000
|
||||
#define MLXSW_PCI_CIR_IN_PARAM_HI MLXSW_PCI_CIR_BASE
|
||||
#define MLXSW_PCI_CIR_IN_PARAM_LO (MLXSW_PCI_CIR_BASE + 0x04)
|
||||
#define MLXSW_PCI_CIR_IN_MODIFIER (MLXSW_PCI_CIR_BASE + 0x08)
|
||||
#define MLXSW_PCI_CIR_OUT_PARAM_HI (MLXSW_PCI_CIR_BASE + 0x0C)
|
||||
#define MLXSW_PCI_CIR_OUT_PARAM_LO (MLXSW_PCI_CIR_BASE + 0x10)
|
||||
#define MLXSW_PCI_CIR_TOKEN (MLXSW_PCI_CIR_BASE + 0x14)
|
||||
#define MLXSW_PCI_CIR_CTRL (MLXSW_PCI_CIR_BASE + 0x18)
|
||||
#define MLXSW_PCI_CIR_CTRL_GO_BIT BIT(23)
|
||||
#define MLXSW_PCI_CIR_CTRL_EVREQ_BIT BIT(22)
|
||||
#define MLXSW_PCI_CIR_CTRL_OPCODE_MOD_SHIFT 12
|
||||
#define MLXSW_PCI_CIR_CTRL_STATUS_SHIFT 24
|
||||
#define MLXSW_PCI_CIR_TIMEOUT_MSECS 1000
|
||||
|
||||
#define MLXSW_PCI_SW_RESET 0xF0010
|
||||
#define MLXSW_PCI_SW_RESET_RST_BIT BIT(0)
|
||||
#define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 5000
|
||||
#define MLXSW_PCI_FW_READY 0xA1844
|
||||
#define MLXSW_PCI_FW_READY_MASK 0xFF
|
||||
#define MLXSW_PCI_FW_READY_MAGIC 0x5E
|
||||
|
||||
#define MLXSW_PCI_DOORBELL_SDQ_OFFSET 0x000
|
||||
#define MLXSW_PCI_DOORBELL_RDQ_OFFSET 0x200
|
||||
#define MLXSW_PCI_DOORBELL_CQ_OFFSET 0x400
|
||||
#define MLXSW_PCI_DOORBELL_EQ_OFFSET 0x600
|
||||
#define MLXSW_PCI_DOORBELL_ARM_CQ_OFFSET 0x800
|
||||
#define MLXSW_PCI_DOORBELL_ARM_EQ_OFFSET 0xA00
|
||||
|
||||
#define MLXSW_PCI_DOORBELL(offset, type_offset, num) \
|
||||
((offset) + (type_offset) + (num) * 4)
|
||||
|
||||
#define MLXSW_PCI_CQS_MAX 96
|
||||
#define MLXSW_PCI_EQS_COUNT 2
|
||||
#define MLXSW_PCI_EQ_ASYNC_NUM 0
|
||||
#define MLXSW_PCI_EQ_COMP_NUM 1
|
||||
|
||||
#define MLXSW_PCI_AQ_PAGES 8
|
||||
#define MLXSW_PCI_AQ_SIZE (MLXSW_PCI_PAGE_SIZE * MLXSW_PCI_AQ_PAGES)
|
||||
#define MLXSW_PCI_WQE_SIZE 32 /* 32 bytes per element */
|
||||
#define MLXSW_PCI_CQE_SIZE 16 /* 16 bytes per element */
|
||||
#define MLXSW_PCI_EQE_SIZE 16 /* 16 bytes per element */
|
||||
#define MLXSW_PCI_WQE_COUNT (MLXSW_PCI_AQ_SIZE / MLXSW_PCI_WQE_SIZE)
|
||||
#define MLXSW_PCI_CQE_COUNT (MLXSW_PCI_AQ_SIZE / MLXSW_PCI_CQE_SIZE)
|
||||
#define MLXSW_PCI_EQE_COUNT (MLXSW_PCI_AQ_SIZE / MLXSW_PCI_EQE_SIZE)
|
||||
#define MLXSW_PCI_EQE_UPDATE_COUNT 0x80
|
||||
|
||||
#define MLXSW_PCI_WQE_SG_ENTRIES 3
|
||||
#define MLXSW_PCI_WQE_TYPE_ETHERNET 0xA
|
||||
|
||||
/* pci_wqe_c
|
||||
* If set it indicates that a completion should be reported upon
|
||||
* execution of this descriptor.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
|
||||
|
||||
/* pci_wqe_lp
|
||||
* Local Processing, set if packet should be processed by the local
|
||||
* switch hardware:
|
||||
* For Ethernet EMAD (Direct Route and non Direct Route) -
|
||||
* must be set if packet destination is local device
|
||||
* For InfiniBand CTL - must be set if packet destination is local device
|
||||
* Otherwise it must be clear
|
||||
* Local Process packets must not exceed the size of 2K (including payload
|
||||
* and headers).
|
||||
*/
|
||||
MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
|
||||
|
||||
/* pci_wqe_type
|
||||
* Packet type.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
|
||||
|
||||
/* pci_wqe_byte_count
|
||||
* Size of i-th scatter/gather entry, 0 if entry is unused.
|
||||
*/
|
||||
MLXSW_ITEM16_INDEXED(pci, wqe, byte_count, 0x02, 0, 14, 0x02, 0x00, false);
|
||||
|
||||
/* pci_wqe_address
|
||||
* Physical address of i-th scatter/gather entry.
|
||||
* Gather Entries must be 2Byte aligned.
|
||||
*/
|
||||
MLXSW_ITEM64_INDEXED(pci, wqe, address, 0x08, 0, 64, 0x8, 0x0, false);
|
||||
|
||||
/* pci_cqe_lag
|
||||
* Packet arrives from a port which is a LAG
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, lag, 0x00, 23, 1);
|
||||
|
||||
/* pci_cqe_system_port/lag_id
|
||||
* When lag=0: System port on which the packet was received
|
||||
* When lag=1:
|
||||
* bits [15:4] LAG ID on which the packet was received
|
||||
* bits [3:0] sub_port on which the packet was received
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, system_port, 0x00, 0, 16);
|
||||
MLXSW_ITEM32(pci, cqe, lag_id, 0x00, 4, 12);
|
||||
MLXSW_ITEM32(pci, cqe, lag_port_index, 0x00, 0, 4);
|
||||
|
||||
/* pci_cqe_wqe_counter
|
||||
* WQE count of the WQEs completed on the associated dqn
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, wqe_counter, 0x04, 16, 16);
|
||||
|
||||
/* pci_cqe_byte_count
|
||||
* Byte count of received packets including additional two
|
||||
* Reserved Bytes that are append to the end of the frame.
|
||||
* Reserved for Send CQE.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, byte_count, 0x04, 0, 14);
|
||||
|
||||
/* pci_cqe_trap_id
|
||||
* Trap ID that captured the packet.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, trap_id, 0x08, 0, 8);
|
||||
|
||||
/* pci_cqe_crc
|
||||
* Length include CRC. Indicates the length field includes
|
||||
* the packet's CRC.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, crc, 0x0C, 8, 1);
|
||||
|
||||
/* pci_cqe_e
|
||||
* CQE with Error.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, e, 0x0C, 7, 1);
|
||||
|
||||
/* pci_cqe_sr
|
||||
* 1 - Send Queue
|
||||
* 0 - Receive Queue
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, sr, 0x0C, 6, 1);
|
||||
|
||||
/* pci_cqe_dqn
|
||||
* Descriptor Queue (DQ) Number.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, dqn, 0x0C, 1, 5);
|
||||
|
||||
/* pci_cqe_owner
|
||||
* Ownership bit.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, cqe, owner, 0x0C, 0, 1);
|
||||
|
||||
/* pci_eqe_event_type
|
||||
* Event type.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, event_type, 0x0C, 24, 8);
|
||||
#define MLXSW_PCI_EQE_EVENT_TYPE_COMP 0x00
|
||||
#define MLXSW_PCI_EQE_EVENT_TYPE_CMD 0x0A
|
||||
|
||||
/* pci_eqe_event_sub_type
|
||||
* Event type.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, event_sub_type, 0x0C, 16, 8);
|
||||
|
||||
/* pci_eqe_cqn
|
||||
* Completion Queue that triggeret this EQE.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cqn, 0x0C, 8, 7);
|
||||
|
||||
/* pci_eqe_owner
|
||||
* Ownership bit.
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, owner, 0x0C, 0, 1);
|
||||
|
||||
/* pci_eqe_cmd_token
|
||||
* Command completion event - token
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_token, 0x08, 16, 16);
|
||||
|
||||
/* pci_eqe_cmd_status
|
||||
* Command completion event - status
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_status, 0x08, 0, 8);
|
||||
|
||||
/* pci_eqe_cmd_out_param_h
|
||||
* Command completion event - output parameter - higher part
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_out_param_h, 0x0C, 0, 32);
|
||||
|
||||
/* pci_eqe_cmd_out_param_l
|
||||
* Command completion event - output parameter - lower part
|
||||
*/
|
||||
MLXSW_ITEM32(pci, eqe, cmd_out_param_l, 0x10, 0, 32);
|
||||
|
||||
#endif
|
||||
|
|
@ -37,6 +37,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/ethtool.h>
|
||||
|
|
@ -59,6 +60,7 @@
|
|||
#include <net/netevent.h>
|
||||
|
||||
#include "spectrum.h"
|
||||
#include "pci.h"
|
||||
#include "core.h"
|
||||
#include "reg.h"
|
||||
#include "port.h"
|
||||
|
|
@ -2220,6 +2222,7 @@ static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
|
|||
dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
|
||||
if (!dev)
|
||||
return -ENOMEM;
|
||||
SET_NETDEV_DEV(dev, mlxsw_sp->bus_info->dev);
|
||||
mlxsw_sp_port = netdev_priv(dev);
|
||||
mlxsw_sp_port->dev = dev;
|
||||
mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
|
||||
|
|
@ -3066,8 +3069,7 @@ static struct mlxsw_config_profile mlxsw_sp_config_profile = {
|
|||
};
|
||||
|
||||
static struct mlxsw_driver mlxsw_sp_driver = {
|
||||
.kind = MLXSW_DEVICE_KIND_SPECTRUM,
|
||||
.owner = THIS_MODULE,
|
||||
.kind = mlxsw_sp_driver_name,
|
||||
.priv_size = sizeof(struct mlxsw_sp),
|
||||
.init = mlxsw_sp_init,
|
||||
.fini = mlxsw_sp_fini,
|
||||
|
|
@ -4662,6 +4664,16 @@ static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
|
|||
.notifier_call = mlxsw_sp_router_netevent_event,
|
||||
};
|
||||
|
||||
static const struct pci_device_id mlxsw_sp_pci_id_table[] = {
|
||||
{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SPECTRUM), 0},
|
||||
{0, },
|
||||
};
|
||||
|
||||
static struct pci_driver mlxsw_sp_pci_driver = {
|
||||
.name = mlxsw_sp_driver_name,
|
||||
.id_table = mlxsw_sp_pci_id_table,
|
||||
};
|
||||
|
||||
static int __init mlxsw_sp_module_init(void)
|
||||
{
|
||||
int err;
|
||||
|
|
@ -4673,8 +4685,15 @@ static int __init mlxsw_sp_module_init(void)
|
|||
err = mlxsw_core_driver_register(&mlxsw_sp_driver);
|
||||
if (err)
|
||||
goto err_core_driver_register;
|
||||
|
||||
err = mlxsw_pci_driver_register(&mlxsw_sp_pci_driver);
|
||||
if (err)
|
||||
goto err_pci_driver_register;
|
||||
|
||||
return 0;
|
||||
|
||||
err_pci_driver_register:
|
||||
mlxsw_core_driver_unregister(&mlxsw_sp_driver);
|
||||
err_core_driver_register:
|
||||
unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
|
||||
unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
|
||||
|
|
@ -4684,6 +4703,7 @@ static int __init mlxsw_sp_module_init(void)
|
|||
|
||||
static void __exit mlxsw_sp_module_exit(void)
|
||||
{
|
||||
mlxsw_pci_driver_unregister(&mlxsw_sp_pci_driver);
|
||||
mlxsw_core_driver_unregister(&mlxsw_sp_driver);
|
||||
unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
|
||||
unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
|
||||
|
|
@ -4696,4 +4716,4 @@ module_exit(mlxsw_sp_module_exit);
|
|||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
|
||||
MODULE_DESCRIPTION("Mellanox Spectrum driver");
|
||||
MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);
|
||||
MODULE_DEVICE_TABLE(pci, mlxsw_sp_pci_id_table);
|
||||
|
|
|
|||
|
|
@ -1980,7 +1980,7 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp)
|
|||
if (err)
|
||||
goto err_vrs_init;
|
||||
|
||||
err = mlxsw_sp_neigh_init(mlxsw_sp);
|
||||
err = mlxsw_sp_neigh_init(mlxsw_sp);
|
||||
if (err)
|
||||
goto err_neigh_init;
|
||||
|
||||
|
|
|
|||
|
|
@ -37,6 +37,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/slab.h>
|
||||
|
|
@ -46,6 +47,7 @@
|
|||
#include <net/switchdev.h>
|
||||
#include <generated/utsrelease.h>
|
||||
|
||||
#include "pci.h"
|
||||
#include "core.h"
|
||||
#include "reg.h"
|
||||
#include "port.h"
|
||||
|
|
@ -966,6 +968,7 @@ static int mlxsw_sx_port_create(struct mlxsw_sx *mlxsw_sx, u8 local_port)
|
|||
dev = alloc_etherdev(sizeof(struct mlxsw_sx_port));
|
||||
if (!dev)
|
||||
return -ENOMEM;
|
||||
SET_NETDEV_DEV(dev, mlxsw_sx->bus_info->dev);
|
||||
mlxsw_sx_port = netdev_priv(dev);
|
||||
mlxsw_sx_port->dev = dev;
|
||||
mlxsw_sx_port->mlxsw_sx = mlxsw_sx;
|
||||
|
|
@ -1544,8 +1547,7 @@ static struct mlxsw_config_profile mlxsw_sx_config_profile = {
|
|||
};
|
||||
|
||||
static struct mlxsw_driver mlxsw_sx_driver = {
|
||||
.kind = MLXSW_DEVICE_KIND_SWITCHX2,
|
||||
.owner = THIS_MODULE,
|
||||
.kind = mlxsw_sx_driver_name,
|
||||
.priv_size = sizeof(struct mlxsw_sx),
|
||||
.init = mlxsw_sx_init,
|
||||
.fini = mlxsw_sx_fini,
|
||||
|
|
@ -1554,13 +1556,38 @@ static struct mlxsw_driver mlxsw_sx_driver = {
|
|||
.profile = &mlxsw_sx_config_profile,
|
||||
};
|
||||
|
||||
static const struct pci_device_id mlxsw_sx_pci_id_table[] = {
|
||||
{PCI_VDEVICE(MELLANOX, PCI_DEVICE_ID_MELLANOX_SWITCHX2), 0},
|
||||
{0, },
|
||||
};
|
||||
|
||||
static struct pci_driver mlxsw_sx_pci_driver = {
|
||||
.name = mlxsw_sx_driver_name,
|
||||
.id_table = mlxsw_sx_pci_id_table,
|
||||
};
|
||||
|
||||
static int __init mlxsw_sx_module_init(void)
|
||||
{
|
||||
return mlxsw_core_driver_register(&mlxsw_sx_driver);
|
||||
int err;
|
||||
|
||||
err = mlxsw_core_driver_register(&mlxsw_sx_driver);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = mlxsw_pci_driver_register(&mlxsw_sx_pci_driver);
|
||||
if (err)
|
||||
goto err_pci_driver_register;
|
||||
|
||||
return 0;
|
||||
|
||||
err_pci_driver_register:
|
||||
mlxsw_core_driver_unregister(&mlxsw_sx_driver);
|
||||
return err;
|
||||
}
|
||||
|
||||
static void __exit mlxsw_sx_module_exit(void)
|
||||
{
|
||||
mlxsw_pci_driver_unregister(&mlxsw_sx_pci_driver);
|
||||
mlxsw_core_driver_unregister(&mlxsw_sx_driver);
|
||||
}
|
||||
|
||||
|
|
@ -1570,4 +1597,4 @@ module_exit(mlxsw_sx_module_exit);
|
|||
MODULE_LICENSE("Dual BSD/GPL");
|
||||
MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
|
||||
MODULE_DESCRIPTION("Mellanox SwitchX-2 driver");
|
||||
MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SWITCHX2);
|
||||
MODULE_DEVICE_TABLE(pci, mlxsw_sx_pci_id_table);
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user