forked from luck/tmp_suning_uos_patched
ARM development updates for 5.6-rc1:
- decompressor updates - prevention of out-of-bounds access while stacktracing - fix a section mismatch warning with free_memmap() - make kexec depend on MMU to avoid some build errors - remove swapops stubs -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEuNNh8scc2k/wOAE+9OeQG+StrGQFAl45YJAACgkQ9OeQG+St rGRAVg/9FDI+gEO3S2DQW7lHL6Qd3wSMTRyUY71Em1agsj9GWijEO7zrbjpXeu5s 1X73A93J6Q0FezXx4omf6AgzIJXVhkDGa6rtFGYmO4IJK6Jx+FMUAGSIPFdJCVHo gNNSJCgfPTLGFhtXPVQZotidePl+oK8FGC+4XiUvlK/dvv2iuVEdV2uUyAKOaE0Z zmhpOPJg1W7VWXYgNBnOUm9sG4t3FdjbiqgCImEMterV/ITnl9/ZGZr4wtPeooV8 e9/0HI5SRT+ZLP0bwkGn9tA4w6WrZFU1Q8wIJgPNbCBv/1YIFzRoZYvxpVaWSPVp cV3Y1/YhANIgV8tw8kCoxGS4cQTmHNf2Br5uB5dcCS86WCglfztL0sEGfXZVzkq5 YPcoSOnV+0dCxHygRcOyBR5b8KPUBYSMraUJcwd/Vz8/GgNlKj1Ab60JmSHZ9LLp J8y6ZqHeVNFOc/q9L7W2pfG5auOFSNn0p4YiLGlO5txay3ROlCPicksUBY8XEfhn XYAE5fhWoVKO4EqAaCFw/Cftjd1N5WB0S+klneQ6r0IW3XAgAalmFfzRw1j+qEpO lq0iYbhLYsR29OvkmhfjnaQvjMYFIPR3tLD0ybbKgXvlMPZRNOtCD2LymBvwq/vU H6qUzO7SitSz2kbdFzd9oK19qZOrU6SSp5w+v+0do68zZ9RQBkc= =ye3L -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm Pull ARM updates from Russell King: - decompressor updates - prevention of out-of-bounds access while stacktracing - fix a section mismatch warning with free_memmap() - make kexec depend on MMU to avoid some build errors - remove swapops stubs * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8954/1: NOMMU: remove stubs for swapops ARM: 8952/1: Disable kmemleak on XIP kernels ARM: 8951/1: Fix Kexec compilation issue. ARM: 8949/1: mm: mark free_memmap as __init ARM: 8948/1: Prevent OOB access in stacktrace ARM: 8945/1: decompressor: use CONFIG option instead of cc-option ARM: 8942/1: Revert "8857/1: efi: enable CP15 DMB instructions before cleaning the cache" ARM: 8941/1: decompressor: enable CP15 barrier instructions in v7 cache setup code
This commit is contained in:
commit
d60ddd2442
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@ -74,7 +74,7 @@ config ARM
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select HAVE_CONTEXT_TRACKING
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select HAVE_COPY_THREAD_TLS
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select HAVE_C_RECORDMCOUNT
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL
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select HAVE_DMA_CONTIGUOUS if MMU
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select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
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select HAVE_DYNAMIC_FTRACE_WITH_REGS if HAVE_DYNAMIC_FTRACE
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@ -1905,7 +1905,7 @@ config XIP_DEFLATED_DATA
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config KEXEC
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bool "Kexec system call (EXPERIMENTAL)"
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depends on (!SMP || PM_SLEEP_SMP)
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depends on !CPU_V7M
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depends on MMU
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select KEXEC_CORE
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help
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kexec is a system call that implements the ability to shutdown your
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@ -110,12 +110,12 @@ endif
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# -fstack-protector-strong triggers protection checks in this code,
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# but it is being used too early to link to meaningful stack_chk logic.
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nossp_flags := $(call cc-option, -fno-stack-protector)
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CFLAGS_atags_to_fdt.o := $(nossp_flags)
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CFLAGS_fdt.o := $(nossp_flags)
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CFLAGS_fdt_ro.o := $(nossp_flags)
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CFLAGS_fdt_rw.o := $(nossp_flags)
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CFLAGS_fdt_wip.o := $(nossp_flags)
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nossp-flags-$(CONFIG_CC_HAS_STACKPROTECTOR_NONE) := -fno-stack-protector
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CFLAGS_atags_to_fdt.o := $(nossp-flags-y)
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CFLAGS_fdt.o := $(nossp-flags-y)
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CFLAGS_fdt_ro.o := $(nossp-flags-y)
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CFLAGS_fdt_rw.o := $(nossp-flags-y)
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CFLAGS_fdt_wip.o := $(nossp-flags-y)
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ccflags-y := -fpic $(call cc-option,-mno-single-pic-base,) -fno-builtin -I$(obj)
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asflags-y := -DZIMAGE
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@ -140,6 +140,17 @@
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#endif
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.endm
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.macro enable_cp15_barriers, reg
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mrc p15, 0, \reg, c1, c0, 0 @ read SCTLR
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tst \reg, #(1 << 5) @ CP15BEN bit set?
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bne .L_\@
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orr \reg, \reg, #(1 << 5) @ CP15 barrier instructions
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mcr p15, 0, \reg, c1, c0, 0 @ write SCTLR
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ARM( .inst 0xf57ff06f @ v7+ isb )
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THUMB( isb )
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.L_\@:
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.endm
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.section ".start", "ax"
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/*
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* sort out different calling conventions
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@ -820,6 +831,7 @@ __armv4_mmu_cache_on:
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mov pc, r12
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__armv7_mmu_cache_on:
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enable_cp15_barriers r11
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mov r12, lr
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#ifdef CONFIG_MMU
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mrc p15, 0, r11, c0, c1, 4 @ read ID_MMFR0
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@ -1209,6 +1221,7 @@ __armv6_mmu_cache_flush:
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mov pc, lr
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__armv7_mmu_cache_flush:
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enable_cp15_barriers r10
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tst r4, #1
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bne iflush
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mrc p15, 0, r10, c0, c1, 5 @ read ID_MMFR1
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@ -1447,21 +1460,7 @@ ENTRY(efi_stub_entry)
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@ Preserve return value of efi_entry() in r4
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mov r4, r0
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@ our cache maintenance code relies on CP15 barrier instructions
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@ but since we arrived here with the MMU and caches configured
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@ by UEFI, we must check that the CP15BEN bit is set in SCTLR.
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@ Note that this bit is RAO/WI on v6 and earlier, so the ISB in
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@ the enable path will be executed on v7+ only.
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mrc p15, 0, r1, c1, c0, 0 @ read SCTLR
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tst r1, #(1 << 5) @ CP15BEN bit set?
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bne 0f
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orr r1, r1, #(1 << 5) @ CP15 barrier instructions
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mcr p15, 0, r1, c1, c0, 0 @ write SCTLR
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ARM( .inst 0xf57ff06f @ v7+ isb )
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THUMB( isb )
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0: bl cache_clean_flush
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bl cache_clean_flush
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bl cache_off
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@ Set parameters for booting zImage according to boot protocol
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@ -42,12 +42,6 @@
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#define swapper_pg_dir ((pgd_t *) 0)
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#define __swp_type(x) (0)
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#define __swp_offset(x) (0)
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#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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typedef pte_t *pte_addr_t;
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@ -92,6 +92,8 @@ static int save_trace(struct stackframe *frame, void *d)
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return 0;
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regs = (struct pt_regs *)frame->sp;
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if ((unsigned long)®s[1] > ALIGN(frame->sp, THREAD_SIZE))
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return 0;
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trace->entries[trace->nr_entries++] = regs->ARM_pc;
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@ -64,14 +64,16 @@ static void dump_mem(const char *, const char *, unsigned long, unsigned long);
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void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame)
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{
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unsigned long end = frame + 4 + sizeof(struct pt_regs);
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#ifdef CONFIG_KALLSYMS
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printk("[<%08lx>] (%ps) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from);
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#else
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printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from);
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#endif
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if (in_entry_text(from))
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dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs));
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if (in_entry_text(from) && end <= ALIGN(frame, THREAD_SIZE))
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dump_mem("", "Exception stack", frame + 4, end);
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}
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void dump_backtrace_stm(u32 *stack, u32 instruction)
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@ -324,7 +324,7 @@ static inline void poison_init_mem(void *s, size_t count)
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*p++ = 0xe7fddef0;
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}
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static inline void
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static inline void __init
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free_memmap(unsigned long start_pfn, unsigned long end_pfn)
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{
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struct page *start_pg, *end_pg;
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