forked from luck/tmp_suning_uos_patched
MIPS: Delete unused function add_temporary_entry.
Only available for R4000 style TLBs anyway and proper ordering of initialization code made this crude interface unncecessary. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -24,17 +24,6 @@
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extern void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
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unsigned long entryhi, unsigned long pagemask);
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/*
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* - add_temporary_entry() add a temporary TLB entry. We use TLB entries
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* starting at the top and working down. This is for populating the
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* TLB before trap_init() puts the TLB miss handler in place. It
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* should be used only for entries matching the actual page tables,
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* to prevent inconsistencies.
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*/
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extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
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unsigned long entryhi, unsigned long pagemask);
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/* Basically we have the same two-level (which is the logical three level
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* Linux page table layout folded) page tables as the i386. Some day
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* when we have proper page coloring support we can have a 1% quicker
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@ -376,51 +376,6 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
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EXIT_CRITICAL(flags);
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}
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/*
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* Used for loading TLB entries before trap_init() has started, when we
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* don't actually want to add a wired entry which remains throughout the
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* lifetime of the system
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*/
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static int temp_tlb_entry __cpuinitdata;
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__init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
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unsigned long entryhi, unsigned long pagemask)
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{
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int ret = 0;
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unsigned long flags;
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unsigned long wired;
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unsigned long old_pagemask;
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unsigned long old_ctx;
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ENTER_CRITICAL(flags);
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/* Save old context and create impossible VPN2 value */
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old_ctx = read_c0_entryhi();
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old_pagemask = read_c0_pagemask();
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wired = read_c0_wired();
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if (--temp_tlb_entry < wired) {
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printk(KERN_WARNING
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"No TLB space left for add_temporary_entry\n");
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ret = -ENOSPC;
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goto out;
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}
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write_c0_index(temp_tlb_entry);
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write_c0_pagemask(pagemask);
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write_c0_entryhi(entryhi);
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write_c0_entrylo0(entrylo0);
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write_c0_entrylo1(entrylo1);
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mtc0_tlbw_hazard();
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tlb_write_indexed();
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tlbw_use_hazard();
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write_c0_entryhi(old_ctx);
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write_c0_pagemask(old_pagemask);
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out:
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EXIT_CRITICAL(flags);
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return ret;
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}
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static int __cpuinitdata ntlb;
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static int __init set_ntlb(char *str)
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{
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@ -458,8 +413,6 @@ void __cpuinit tlb_init(void)
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write_c0_pagegrain(pg);
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}
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temp_tlb_entry = current_cpu_data.tlbsize - 1;
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/* From this point on the ARC firmware is dead. */
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local_flush_tlb_all();
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