forked from luck/tmp_suning_uos_patched
powerpc/64: Do load of PACAKBASE in LOAD_HANDLER
The LOAD_HANDLER macro requires that you have previously loaded "reg" with PACAKBASE. Although that gives callers flexibility to get PACAKBASE in some interesting way, none of the callers actually do that. So fold the load of PACAKBASE into the macro, making it simpler for callers to use correctly. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Reviewed-by: Nick Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -52,7 +52,6 @@
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#ifdef CONFIG_RELOCATABLE
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#define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
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ld r12,PACAKBASE(r13); /* get high part of &label */ \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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LOAD_HANDLER(r12,label); \
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mtctr r12; \
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@ -90,6 +89,7 @@
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* that kernelbase be 64K aligned.
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*/
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#define LOAD_HANDLER(reg, label) \
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ld reg,PACAKBASE(r13); /* get high part of &label */ \
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ori reg,reg,(label)-_stext; /* virt addr of handler ... */
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/* Exception register prefixes */
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@ -175,7 +175,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943)
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__EXCEPTION_PROLOG_1(area, extra, vec)
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#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
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ld r12,PACAKBASE(r13); /* get high part of &label */ \
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ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
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mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
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LOAD_HANDLER(r12,label) \
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@ -41,7 +41,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
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#define SYSCALL_PSERIES_2_RFID \
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mfspr r12,SPRN_SRR1 ; \
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ld r10,PACAKBASE(r13) ; \
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LOAD_HANDLER(r10, system_call_entry) ; \
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mtspr SPRN_SRR0,r10 ; \
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ld r10,PACAKMSR(r13) ; \
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@ -64,7 +63,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
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*/
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#define SYSCALL_PSERIES_2_DIRECT \
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mflr r10 ; \
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ld r12,PACAKBASE(r13) ; \
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LOAD_HANDLER(r12, system_call_entry) ; \
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mtctr r12 ; \
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mfspr r12,SPRN_SRR1 ; \
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@ -185,7 +183,6 @@ data_access_slb_pSeries:
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* the kernel ends up being put.
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*/
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mfctr r11
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ld r10,PACAKBASE(r13)
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LOAD_HANDLER(r10, slb_miss_realmode)
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mtctr r10
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bctr
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@ -207,7 +204,6 @@ instruction_access_slb_pSeries:
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b slb_miss_realmode
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#else
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mfctr r11
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ld r10,PACAKBASE(r13)
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LOAD_HANDLER(r10, slb_miss_realmode)
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mtctr r10
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bctr
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@ -459,7 +455,6 @@ BEGIN_FTR_SECTION
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mfmsr r11 /* get MSR value */
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ori r11,r11,MSR_ME /* turn on ME bit */
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ori r11,r11,MSR_RI /* turn on RI bit */
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ld r12,PACAKBASE(r13) /* get high part of &label */
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LOAD_HANDLER(r12, machine_check_handle_early)
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1: mtspr SPRN_SRR0,r12
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mtspr SPRN_SRR1,r11
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@ -472,7 +467,6 @@ BEGIN_FTR_SECTION
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*/
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addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
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ld r11,PACAKMSR(r13)
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ld r12,PACAKBASE(r13)
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LOAD_HANDLER(r12, unrecover_mce)
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li r10,MSR_ME
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andc r11,r11,r10 /* Turn off MSR_ME */
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@ -493,7 +487,6 @@ machine_check_pSeries_0:
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* used, so nested machine check corrupts it. machine_check_common
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* enables MSR_RI.
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*/
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ld r12,PACAKBASE(r13)
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ld r10,PACAKMSR(r13)
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xori r10,r10,MSR_RI
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mfspr r11,SPRN_SRR0
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@ -795,7 +788,6 @@ data_access_slb_relon_pSeries:
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* the kernel ends up being put.
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*/
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mfctr r11
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ld r10,PACAKBASE(r13)
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LOAD_HANDLER(r10, slb_miss_realmode)
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mtctr r10
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bctr
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@ -816,7 +808,6 @@ instruction_access_slb_relon_pSeries:
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b slb_miss_realmode
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#else
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mfctr r11
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ld r10,PACAKBASE(r13)
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LOAD_HANDLER(r10, slb_miss_realmode)
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mtctr r10
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bctr
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@ -1357,7 +1348,6 @@ machine_check_handle_early:
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andi. r11,r12,MSR_RI
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bne 2f
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1: mfspr r11,SPRN_SRR0
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ld r10,PACAKBASE(r13)
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LOAD_HANDLER(r10,unrecover_mce)
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mtspr SPRN_SRR0,r10
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ld r10,PACAKMSR(r13)
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@ -1461,7 +1451,6 @@ END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX)
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b . /* prevent speculative execution */
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2: mfspr r11,SPRN_SRR0
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ld r10,PACAKBASE(r13)
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LOAD_HANDLER(r10,unrecov_slb)
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mtspr SPRN_SRR0,r10
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ld r10,PACAKMSR(r13)
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@ -1478,7 +1467,6 @@ unrecov_slb:
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b 1b
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8: mfspr r11,SPRN_SRR0
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ld r10,PACAKBASE(r13)
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LOAD_HANDLER(r10,bad_addr_slb)
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mtspr SPRN_SRR0,r10
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ld r10,PACAKMSR(r13)
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