forked from luck/tmp_suning_uos_patched
[POWERPC] 83xx: mpc832x mds: Fix board PHY reset code
currently the board-level PHY reset code for the mpc832x MDS messes with reset configuration words source settings which is plain wrong (it looks like this board code was cut-n-pasted from the mpc8360 mds code, which has the PHY reset bits in a different BCSR); this patch points the PHY reset code to the proper mpc832x mds PHY reset bits in the BCSR. Signed-off-by: Peter Van Ackeren <peter.vanackeren@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void)
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if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
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!= NULL){
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/* Reset the Ethernet PHY */
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bcsr_regs[9] &= ~0x20;
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/* Reset the Ethernet PHYs */
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#define BCSR8_FETH_RST 0x50
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bcsr_regs[8] &= ~BCSR8_FETH_RST;
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udelay(1000);
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bcsr_regs[9] |= 0x20;
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bcsr_regs[8] |= BCSR8_FETH_RST;
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iounmap(bcsr_regs);
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of_node_put(np);
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}
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